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STM32F765VIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F765VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 output TRACECLK/SPI4_SCK/SAI1_MCLK_A/QUADSPI_BK1_IO2/ETH_MII_TXD3/FMC_A23/EVENTOUT I/O pad with 5V tolerance
2 PE3 output TRACED0/SAI1_SD_B/FMC_A19/EVENTOUT I/O pad with 5V tolerance
3 PE4 output TRACED1/TIM9_CH1/SPI4_NSS/SAI1_FS_A/DFSDM1_DATIN3/FMC_A20/DCMI_D4/LCD_B0/EVENTOUT I/O pad with 5V tolerance
4 PE5 output TRACED2/TIM9_CH2/SPI4_MISO/SAI1_SCK_A/DFSDM1_CKIN3/FMC_A21/DCMI_D6/LCD_G0/EVENTOUT I/O pad with 5V tolerance
5 PE6 output TRACED3/TIM1_BKIN2/SPI4_MOSI/SAI1_SD_A/SAI2_MCLK_B/FMC_A22/DCMI_D7/LCD_G1/EVENTOUT I/O pad with 5V tolerance
6 VBAT power_in Backup battery supply pin for RTC and backup registers
7 PC13 output RTC_TAMP1/RTC_TS/RTC_OUT/WKUP4/EVENTOUT I/O pad with 5V tolerance and limited output capability (3mA max, 2MHz)
8 PC14-OSC32_IN output OSC32_IN/EVENTOUT I/O for 32kHz oscillator input, 5V tolerant in digital mode
9 PC15-OSC32_OUT output OSC32_OUT/EVENTOUT I/O for 32kHz oscillator output, 5V tolerant in digital mode
10 VSS power_in Ground connection point
11 VDD power_in Main power supply 1.7V to 3.6V
12 PH0-OSC_IN output OSC_IN/EVENTOUT crystal oscillator input, 5V tolerant in digital mode
13 PH1-OSC_OUT output OSC_OUT/EVENTOUT crystal oscillator output, 5V tolerant in digital mode
14 NRST bidirectional Bidirectional reset pin with weak internal pull-up resistor
15 PC0 output DFSDM1_CKIN0/DFSDM1_DATIN4/SAI2_FS_B/OTG_HS_ULPI_STP/FMC_SDNWE/LCD_R5/EVENTOUT with ADC1/2/3_IN10
16 PC1 output TRACED0/DFSDM1_DATIN0/SPI2_MOSI/SAI1_SD_A/ETH_MDC/MDIOS_MDC/EVENTOUT with ADC1/2/3_IN11
17 PC2 output DFSDM1_CKIN1/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/FMC_SDNE0/EVENTOUT with ADC1/2/3_IN12
18 PC3 output DFSDM1_DATIN1/SPI2_MOSI/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/FMC_SDCKE0/EVENTOUT with ADC1/2/3_IN13
19 VSSA power_in Analog ground connection
20 VREF+ power_in ADC reference voltage positive
21 VDDA power_in Analog power supply 1.7V to 3.6V
22 PA0-WKUP output TIM2_CH1/TIM5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/SAI2_SD_B/ETH_MII_CRS/EVENTOUT with WKUP1 and ADC1/2/3_IN0
23 PA1 output TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/QUADSPI_BK1_IO3/SAI2_MCLK_B/ETH_MII_RX_CLK/LCD_R2/EVENTOUT with ADC1/2/3_IN1
24 PA2 output TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/SAI2_SCK_B/ETH_MDIO/MDIOS_MDIO/LCD_R1/EVENTOUT with WKUP2 and ADC1/2/3_IN2
25 PA3 output TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/LCD_B2/OTG_HS_ULPI_D0/ETH_MII_COL/LCD_B5/EVENTOUT with ADC1/2/3_IN3
26 VSS power_in Ground connection point
27 VDD power_in Main power supply 1.7V to 3.6V
28 PA4 output SPI1_NSS/SPI3_NSS/USART2_CK/SPI6_NSS/OTG_HS_SOF/DCMI_HSYNC/LCD_VSYNC/EVENTOUT with DAC_OUT1 and ADC1/2/3_IN4
29 PA5 output SPI1_SCK/SPI6_SCK/OTG_HS_ULPI_CK/LCD_R4/EVENTOUT with DAC_OUT2 and ADC1/2/3_IN5
30 PA6 output TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/SPI6_MISO/TIM13_CH1/MDIOS_MDC/DCMI_PIXCLK/LCD_G2/EVENTOUT with ADC1/2_IN6
31 PA7 output TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/SPI6_MOSI/TIM14_CH1/ETH_MII_RX_DV/FMC_SDNWE/EVENTOUT with ADC1/2_IN7
32 PC4 output DFSDM1_CKIN2/I2S1_MCK/SPDIF_RX2/ETH_MII_RXD0/FMC_SDNE0/EVENTOUT with ADC1/2_IN14
33 PC5 output DFSDM1_DATIN2/SPDIF_RX3/ETH_MII_RXD1/FMC_SDCKE0/EVENTOUT with ADC1/2_IN15
34 PB0 output TIM1_CH2N/TIM3_CH3/TIM8_CH2N/DFSDM1_CKOUT/UART4_CTS/LCD_R3/OTG_HS_ULPI_D1/ETH_MII_RXD2/LCD_G1/EVENTOUT with ADC1/2_IN8
35 PB1 output TIM1_CH3N/TIM3_CH4/TIM8_CH3N/DFSDM1_DATIN1/LCD_R6/OTG_HS_ULPI_D2/ETH_MII_RXD3/LCD_G0/EVENTOUT with ADC1/2_IN9
36 PB2 output SAI1_SD_A/SPI3_MOSI/QUADSPI_CLK/DFSDM1_CKIN1/EVENTOUT
37 PE7 output TIM1_ETR/DFSDM1_DATIN2/UART7_RX/QUADSPI_BK2_IO0/FMC_D4/EVENTOUT
38 PE8 output TIM1_CH1N/DFSDM1_CKIN2/UART7_TX/QUADSPI_BK2_IO1/FMC_D5/EVENTOUT
39 PE9 output TIM1_CH1/DFSDM1_CKOUT/UART7_RTS/QUADSPI_BK2_IO2/FMC_D6/EVENTOUT
40 PE10 output TIM1_CH2N/DFSDM1_DATIN4/UART7_CTS/QUADSPI_BK2_IO3/FMC_D7/EVENTOUT
41 PE11 output TIM1_CH2/SPI4_NSS/DFSDM1_CKIN4/SAI2_SD_B/FMC_D8/LCD_G3/EVENTOUT
42 PE12 output TIM1_CH3N/SPI4_SCK/DFSDM1_DATIN5/SAI2_SCK_B/FMC_D9/LCD_B4/EVENTOUT
43 PE13 output TIM1_CH3/SPI4_MISO/DFSDM1_CKIN5/SAI2_FS_B/FMC_D10/LCD_DE/EVENTOUT
44 PE14 output TIM1_CH4/SPI4_MOSI/SAI2_MCLK_B/FMC_D11/LCD_CLK/EVENTOUT
45 PE15 output TIM1_BKIN/FMC_D12/LCD_R7/EVENTOUT
46 PB10 output TIM2_CH3/I2C2_SCL/SPI2_SCK/DFSDM1_DATIN7/USART3_TX/QUADSPI_BK1_NCS/OTG_HS_ULPI_D3/ETH_MII_RX_ER/LCD_G4/EVENTOUT
47 PB11 output TIM2_CH4/I2C2_SDA/DFSDM1_CKIN7/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/DSI_TE/LCD_G5/EVENTOUT
48 VCAP_1 power_in Voltage regulator decoupling capacitor connection
49 VSS power_in Ground connection point
50 VDD power_in Main power supply 1.7V to 3.6V
51 PB12 output TIM1_BKIN/I2C2_SMBA/SPI2_NSS/DFSDM1_DATIN1/USART3_CK/UART5_RX/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT
52 PB13 output TIM1_CH1N/SPI2_SCK/DFSDM1_CKIN1/USART3_CTS/UART5_TX/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/EVENTOUT with OTG_HS_VBUS
53 PB14 output TIM1_CH2N/TIM8_CH2N/USART1_TX/SPI2_MISO/DFSDM1_DATIN2/USART3_RTS/UART4_RTS/TIM12_CH1/SDMMC2_D0/OTG_HS_DM/EVENTOUT
54 PB15 output RTC_REFIN/TIM1_CH3N/TIM8_CH3N/USART1_RX/SPI2_MOSI/DFSDM1_CKIN2/UART4_CTS/TIM12_CH2/SDMMC2_D1/OTG_HS_DP/EVENTOUT
55 PD8 output DFSDM1_CKIN3/USART3_TX/SPDIF_RX1/FMC_D13/EVENTOUT
56 PD9 output DFSDM1_DATIN3/USART3_RX/FMC_D14/EVENTOUT
57 PD10 output DFSDM1_CKOUT/USART3_CK/FMC_D15/LCD_B3/EVENTOUT
58 PD11 output I2C4_SMBA/USART3_CTS/QUADSPI_BK1_IO0/SAI2_SD_A/FMC_A16/EVENTOUT
59 PD12 output TIM4_CH1/LPTIM1_IN1/I2C4_SCL/USART3_RTS/QUADSPI_BK1_IO1/SAI2_FS_A/FMC_A17/EVENTOUT
60 PD13 output TIM4_CH2/LPTIM1_OUT/I2C4_SDA/QUADSPI_BK1_IO3/SAI2_SCK_A/FMC_A18/EVENTOUT
61 PD14 output TIM4_CH3/UART8_CTS/FMC_D0/EVENTOUT
62 PD15 output TIM4_CH4/UART8_RTS/FMC_D1/EVENTOUT
63 PC6 output TIM3_CH1/TIM8_CH1/I2S2_MCK/DFSDM1_CKIN3/USART6_TX/FMC_NWAIT/SDMMC2_D6/SDMMC1_D6/DCMI_D0/LCD_HSYNC/EVENTOUT
64 PC7 output TIM3_CH2/TIM8_CH2/I2S3_MCK/DFSDM1_DATIN3/USART6_RX/FMC_NE1/SDMMC2_D7/SDMMC1_D7/DCMI_D1/LCD_G6/EVENTOUT
65 PC8 output TRACED1/TIM3_CH3/TIM8_CH3/UART5_RTS/USART6_CK/FMC_NE2/SDMMC1_D0/DCMI_D2/EVENTOUT
66 PC9 output MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/UART5_CTS/QUADSPI_BK1_IO0/LCD_G3/SDMMC1_D1/DCMI_D3/LCD_B2/EVENTOUT
67 PA8 output MCO1/TIM1_CH1/TIM8_BKIN2/I2C3_SCL/USART1_CK/OTG_FS_SOF/CAN3_RX/UART7_RX/LCD_B3/LCD_R6/EVENTOUT
68 PA9 output TIM1_CH2/I2C3_SMBA/SPI2_SCK/USART1_TX/DCMI_D0/LCD_R5/EVENTOUT with OTG_FS_VBUS
69 PA10 output TIM1_CH3/USART1_RX/LCD_B4/OTG_FS_ID/MDIOS_MDIO/DCMI_D1/LCD_B1/EVENTOUT
70 PA11 output TIM1_CH4/SPI2_NSS/UART4_RX/USART1_CTS/CAN1_RX/OTG_FS_DM/LCD_R4/EVENTOUT
71 PA12 output TIM1_ETR/SPI2_SCK/UART4_TX/USART1_RTS/SAI2_FS_B/CAN1_TX/OTG_FS_DP/LCD_R5/EVENTOUT
72 PA13(JTMS-SWDIO) output JTMS-SWDIO Serial Wire/JTAG debug interface data line
73 VCAP_2 power_in Voltage regulator decoupling capacitor connection
74 VSS power_in Ground connection point
75 VDD power_in Main power supply 1.7V to 3.6V
76 PA14(JTCK-SWCLK) output JTCK-SWCLK Serial Wire/JTAG debug interface clock line
77 PA15(JTDI) output JTDI JTAG test data input, TIM2_CH1/HDMI_CEC/SPI1_NSS/SPI3_NSS/SPI6_NSS/UART4_RTS/CAN3_TX/UART7_TX/EVENTOUT
78 PC10 output DFSDM1_CKIN5/SPI3_SCK/USART3_TX/UART4_TX/QUADSPI_BK1_IO1/SDMMC1_D2/DCMI_D8/LCD_R2/EVENTOUT
79 PC11 output DFSDM1_DATIN5/SPI3_MISO/USART3_RX/UART4_RX/QUADSPI_BK2_NCS/SDMMC1_D3/DCMI_D4/EVENTOUT
80 PC12 output TRACED3/SPI3_MOSI/USART3_CK/UART5_TX/SDMMC1_CK/DCMI_D9/EVENTOUT
81 PD0 output DFSDM1_CKIN6/DFSDM1_DATIN7/UART4_RX/CAN1_RX/FMC_D2/EVENTOUT
82 PD1 output DFSDM1_DATIN6/DFSDM1_CKIN7/UART4_TX/CAN1_TX/FMC_D3/EVENTOUT
83 PD2 output TRACED2/TIM3_ETR/UART5_RX/SDMMC1_CMD/DCMI_D11/EVENTOUT
84 PD3 output DFSDM1_CKOUT/SPI2_SCK/DFSDM1_DATIN0/USART2_CTS/FMC_CLK/DCMI_D5/LCD_G7/EVENTOUT
85 PD4 output DFSDM1_CKIN0/USART2_RTS/FMC_NOE/EVENTOUT
86 PD5 output USART2_TX/FMC_NWE/EVENTOUT
87 PD6 output DFSDM1_CKIN4/SPI3_MOSI/SAI1_SD_A/USART2_RX/DFSDM1_DATIN1/SDMMC2_CK/FMC_NWAIT/DCMI_D10/LCD_B2/EVENTOUT
88 PD7 output DFSDM1_DATIN4/SPI1_MOSI/DFSDM1_CKIN1/USART2_CK/SPDIF_RX0/SDMMC2_CMD/FMC_NE1/EVENTOUT
89 PB3(JTDO/TRACESWO) output JTDO/TRACESWO TIM2_CH2/SPI1_SCK/SPI3_SCK/SPI6_SCK/SDMMC2_D2/CAN3_RX/UART7_RX/EVENTOUT
90 PB4(NJTRST) output NJTRST TIM3_CH1/SPI1_MISO/SPI3_MISO/SPI2_NSS/SPI6_MISO/SDMMC2_D3/CAN3_TX/UART7_TX/EVENTOUT
91 PB5 output UART5_RX/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/SPI6_MOSI/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/FMC_SDCKE1/DCMI_D10/LCD_G7/EVENTOUT
92 PB6 output UART5_TX/TIM4_CH1/HDMI_CEC/I2C1_SCL/DFSDM1_DATIN5/USART1_TX/CAN2_TX/QUADSPI_BK1_NCS/I2C4_SCL/FMC_SDNE1/DCMI_D5/EVENTOUT
93 PB7 output TIM4_CH2/I2C1_SDA/DFSDM1_CKIN5/USART1_RX/I2C4_SDA/FMC_NL/DCMI_VSYNC/EVENTOUT
94 BOOT0 input Boot mode selection pin to determine boot from flash or system bootloader
95 PB8 output I2C4_SCL/TIM4_CH3/TIM10_CH1/I2C1_SCL/DFSDM1_CKIN7/UART5_RX/CAN1_RX/SDMMC2_D4/ETH_MII_TXD3/SDMMC1_D4/DCMI_D6/LCD_B6/EVENTOUT
96 PB9 output I2C4_SDA/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/DFSDM1_DATIN7/UART5_TX/CAN1_TX/SDMMC2_D5/I2C4_SMBA/SDMMC1_D5/DCMI_D7/LCD_B7/EVENTOUT
97 PE0 output TIM4_ETR/LPTIM1_ETR/UART8_RX/SAI2_MCLK_A/FMC_NBL0/DCMI_D2/EVENTOUT
98 PE1 output LPTIM1_IN2/UART8_TX/FMC_NBL1/DCMI_D3/EVENTOUT
99 VSS power_in Ground connection point
100 VDD power_in Main power supply 1.7V to 3.6V

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F765VIT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f765vit6-etched.step / stm32f765vit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f765vit6.step / stm32f765vit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (255 pp, sha256 6ed07ca1dc9c1c0f, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF