# STM32F412CEU6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32F412CEU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup supply pin for the RTC and backup registers; function after reset is VBAT. |
| 2 | PC13 | bidirectional | 5 V-tolerant I/O supplied through the power switch, so output mode is limited to 2 MHz with max 30 pF load and no current-source use; EVENTOUT, additional function TAMP_1. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O (except in oscillator mode) supplied through the power switch with the same 2 MHz/30 pF output limits; additional function OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O (except in oscillator mode) supplied through the power switch with the same 2 MHz/30 pF output limits; additional function OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant I/O (except in oscillator mode) that serves as the main oscillator input OSC_IN; alternate function EVENTOUT. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant I/O (except in oscillator mode) that serves as the main oscillator output OSC_OUT; alternate function EVENTOUT. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | VSSA/VREF- | power_in | Analog ground / ADC reference ground supply pin (printed as VSSA/VREF in the table). |
| 9 | VDDA/VREF+ | power_in | Analog supply and positive ADC reference voltage supply pin. |
| 10 | PA0 | bidirectional | 5 V-tolerant I/O with TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, EVENTOUT; additional functions ADC1_0, WKUP1. |
| 11 | PA1 | bidirectional | 5 V-tolerant I/O with TIM2_CH2, TIM5_CH2, SPI4_MOSI/I2S4_SD, USART2_RTS, QUADSPI_BK1_IO3, EVENTOUT; additional function ADC1_1. |
| 12 | PA2 | bidirectional | 5 V-tolerant I/O with TIM2_CH3, TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX, FSMC_D4/DA4, EVENTOUT; additional function ADC1_2. |
| 13 | PA3 | bidirectional | 5 V-tolerant I/O with TIM2_CH4, TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX, FSMC_D5/DA5, EVENTOUT; additional function ADC1_3. |
| 14 | PA4 | bidirectional | 5 V-tolerant I/O with SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, DFSDM1_DATIN1, FSMC_D6/DA6, EVENTOUT; additional function ADC1_4. |
| 15 | PA5 | bidirectional | 5 V-tolerant I/O with TIM2_CH1/ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, DFSDM1_CKIN1, FSMC_D7/DA7, EVENTOUT; additional function ADC1_5. |
| 16 | PA6 | bidirectional | 5 V-tolerant I/O with TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, TIM13_CH1, QUADSPI_BK2_IO0, SDIO_CMD, EVENTOUT; additional function ADC1_6. |
| 17 | PA7 | bidirectional | 5 V-tolerant I/O with TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, TIM14_CH1, QUADSPI_BK2_IO1, EVENTOUT; additional function ADC1_7. |
| 18 | PB0 | bidirectional | 5 V-tolerant I/O with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI5_SCK/I2S5_CK, EVENTOUT; additional function ADC1_8. |
| 19 | PB1 | bidirectional | 5 V-tolerant I/O with TIM1_CH3N, TIM3_CH4, TIM8_CH3N, SPI5_NSS/I2S5_WS, DFSDM1_DATIN0, QUADSPI_CLK, EVENTOUT; additional function ADC1_9. |
| 20 | PB2 | bidirectional | 5 V-tolerant I/O with DFSDM1_CKIN0, QUADSPI_CLK, EVENTOUT; additional function BOOT1. |
| 21 | PB10 | bidirectional | 5 V-tolerant I/O with TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, I2S3_MCK, USART3_TX, I2CFMP1_SCL, SDIO_D7, EVENTOUT. |
| 22 | VCAP_1 | passive | Supply pin for the 1.2 V internal regulator output, which requires an external capacitor. |
| 23 | VSS | power_in | Ground supply pin. |
| 24 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |
| 25 | PB12 | bidirectional | 5 V-tolerant I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SPI4_NSS/I2S4_WS, SPI3_SCK/I2S3_CK, USART3_CK, CAN2_RX, DFSDM1_DATIN1, FSMC_D13/DA13, EVENTOUT. |
| 26 | PB13 | bidirectional | 5 V-tolerant I/O with TIM1_CH1N, I2CFMP1_SMBA, SPI2_SCK/I2S2_CK, SPI4_SCK/I2S4_CK, USART3_CTS, CAN2_TX, DFSDM1_CKIN1, EVENTOUT. |
| 27 | PB14 | bidirectional | 5 V-tolerant I/O with TIM1_CH2N, TIM8_CH2N, I2CFMP1_SDA, SPI2_MISO, I2S2ext_SD, USART3_RTS, DFSDM1_DATIN2, TIM12_CH1, FSMC_D0/DA0, SDIO_D6, EVENTOUT. |
| 28 | PB15 | bidirectional | 5 V-tolerant I/O with RTC_50Hz, TIM1_CH3N, TIM8_CH3N, I2CFMP1_SCL, SPI2_MOSI/I2S2_SD, DFSDM1_CKIN2, TIM12_CH2, SDIO_CK, EVENTOUT. |
| 29 | PA8 | bidirectional | 5 V-tolerant I/O with MCO_1, TIM1_CH1, I2C3_SCL, USART1_CK, USB_FS_SOF, SDIO_D1, EVENTOUT. |
| 30 | PA9 | bidirectional | 5 V-tolerant I/O with TIM1_CH2, I2C3_SMBA, USART1_TX, USB_FS_VBUS, SDIO_D2, EVENTOUT. |
| 31 | PA10 | bidirectional | 5 V-tolerant I/O with TIM1_CH3, SPI5_MOSI/I2S5_SD, USART1_RX, USB_FS_ID, EVENTOUT. |
| 32 | PA11 | bidirectional | 5 V-tolerant I/O with TIM1_CH4, SPI4_MISO, USART1_CTS, USART6_TX, CAN1_RX, USB_FS_DM, EVENTOUT. |
| 33 | PA12 | bidirectional | 5 V-tolerant I/O with TIM1_ETR, SPI5_MISO, USART1_RTS, USART6_RX, CAN1_TX, USB_FS_DP, EVENTOUT. |
| 34 | PA13 | bidirectional | 5 V-tolerant I/O with JTMS-SWDIO and EVENTOUT. |
| 35 | VSS | power_in | Ground supply pin. |
| 36 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |
| 37 | PA14 | bidirectional | 5 V-tolerant I/O with JTCK-SWCLK and EVENTOUT. |
| 38 | PA15 | bidirectional | 5 V-tolerant I/O with JTDI, TIM2_CH1/ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART1_TX, EVENTOUT. |
| 39 | PB3 | bidirectional | 5 V-tolerant I/O with JTDO-SWO, TIM2_CH2, I2CFMP1_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, USART1_RX, I2C2_SDA, EVENTOUT. |
| 40 | PB4 | bidirectional | 5 V-tolerant I/O with JTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, SDIO_D0, EVENTOUT. |
| 41 | PB5 | bidirectional | 5 V-tolerant I/O with TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, CAN2_RX, SDIO_D3, EVENTOUT. |
| 42 | PB6 | bidirectional | 5 V-tolerant I/O with TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, SDIO_D0, EVENTOUT. |
| 43 | PB7 | bidirectional | 5 V-tolerant I/O with TIM4_CH2, I2C1_SDA, USART1_RX, FSMC_NL, EVENTOUT. |
| 44 | BOOT0 | input | Dedicated boot mode selection input pin; additional function VPP. |
| 45 | PB8 | bidirectional | 5 V-tolerant I/O with TIM4_CH3, TIM10_CH1, I2C1_SCL, SPI5_MOSI/I2S5_SD, CAN1_RX, I2C3_SDA, SDIO_D4, EVENTOUT. |
| 46 | PB9 | bidirectional | 5 V-tolerant I/O with TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, I2C2_SDA, SDIO_D5, EVENTOUT. |
| 47 | VSS | power_in | Ground supply pin. |
| 48 | VDD | power_in | Digital supply pin (application supply 1.7 V to 3.6 V). |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |

## CAD (KiCad official)

- Symbol: `STM32F412CEU6`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32f412ceu6-etched.step` / `stm32f412ceu6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f412ceu6.step` / `stm32f412ceu6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923097713938432) (201 pp, sha256 `d640babe702a369d`, retrieved 2026-10-03, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f412ceu6-datasheet.pdf)