component
STM32F103C8T7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F103C8T7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F103C8T7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Power supply for RTC, external 32 kHz oscillator and backup registers (through power switch) when VDD is not present; VBAT = 1.8 to 3.6 V. |
| 2 | PC13-TAMPER-RTC | bidirectional | GPIO port C bit 13, shared with TAMPER-RTC alternate function; supplied through the backup power switch (3 mA max sink/source), output speed limited to 2 MHz with 30 pF load and must not be used as a current source. |
| 3 | PC14-OSC32_IN | bidirectional | GPIO port C bit 14, main function after first backup domain power-up; alternate function OSC32_IN (32.768 kHz RTC crystal input); supplied through the backup power switch (3 mA max, 2 MHz max output speed). |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO port C bit 15, main function after first backup domain power-up; alternate function OSC32_OUT (32.768 kHz RTC crystal output); supplied through the backup power switch (3 mA max, 2 MHz max output speed). |
| 5 | OSC_IN | input | Input of the 4-16 MHz high-speed external (HSE) crystal/ceramic resonator oscillator; can be remapped by software to GPIO PD0 (limited to 50 MHz in output mode). |
| 6 | OSC_OUT | output | Output of the 4-16 MHz high-speed external (HSE) crystal/ceramic resonator oscillator; can be remapped by software to GPIO PD1 (limited to 50 MHz in output mode). |
| 7 | NRST | bidirectional | Active-low system reset input/output with a permanent internal pull-up resistor (RPU) to VDD; a low level on this pin generates a device reset. |
| 8 | VSSA | power_in | Analog ground supply for the ADC, reset blocks, RC oscillators and PLL; must be connected to VSS. |
| 9 | VDDA | power_in | External analog power supply for ADC, reset blocks, RC oscillators and PLL, 2.0 to 3.6 V (minimum 2.4 V when the ADC is used); must be connected to VDD. |
| 10 | PA0-WKUP | bidirectional | GPIO port A bit 0, 5 V tolerant; alternate functions WKUP (standby wakeup), USART2_CTS, ADC12_IN0, TIM2_CH1_ETR. |
| 11 | PA1 | bidirectional | GPIO port A bit 1, 5 V tolerant; alternate functions USART2_RTS, ADC12_IN1, TIM2_CH2. |
| 12 | PA2 | bidirectional | GPIO port A bit 2, 5 V tolerant; alternate functions USART2_TX, ADC12_IN2, TIM2_CH3. |
| 13 | PA3 | bidirectional | GPIO port A bit 3, 5 V tolerant; alternate functions USART2_RX, ADC12_IN3, TIM2_CH4. |
| 14 | PA4 | bidirectional | GPIO port A bit 4, 5 V tolerant; alternate functions SPI1_NSS, USART2_CK, ADC12_IN4. |
| 15 | PA5 | bidirectional | GPIO port A bit 5, 5 V tolerant; alternate functions SPI1_SCK, ADC12_IN5. |
| 16 | PA6 | bidirectional | GPIO port A bit 6, 5 V tolerant; default alternate functions SPI1_MISO, ADC12_IN6, TIM3_CH1, remappable to TIM1_BKIN. |
| 17 | PA7 | bidirectional | GPIO port A bit 7, 5 V tolerant; default alternate functions SPI1_MOSI, ADC12_IN7, TIM3_CH2, remappable to TIM1_CH1N. |
| 18 | PB0 | bidirectional | GPIO port B bit 0, 5 V tolerant; default alternate functions ADC12_IN8, TIM3_CH3, remappable to TIM1_CH2N. |
| 19 | PB1 | bidirectional | GPIO port B bit 1, 5 V tolerant; default alternate functions ADC12_IN9, TIM3_CH4, remappable to TIM1_CH3N. |
| 20 | PB2/BOOT1 | bidirectional | GPIO port B bit 2, 5 V tolerant, shared with BOOT1; sampled together with BOOT0 at reset to select the boot mode (Flash, System memory or SRAM). |
| 21 | PB10 | bidirectional | GPIO port B bit 10, 5 V tolerant; default alternate functions I2C2_SCL, USART3_TX, remappable to TIM2_CH3. |
| 22 | PB11 | bidirectional | GPIO port B bit 11, 5 V tolerant; default alternate functions I2C2_SDA, USART3_RX, remappable to TIM2_CH4. |
| 23 | VSS_1 | power_in | Digital ground supply pin. |
| 24 | VDD_1 | power_in | External digital power supply pin, 2.0 to 3.6 V, for I/Os and internal regulator. |
| 25 | PB12 | bidirectional | GPIO port B bit 12, 5 V tolerant; alternate functions SPI2_NSS, I2C2_SMBAl, USART3_CK, TIM1_BKIN. |
| 26 | PB13 | bidirectional | GPIO port B bit 13, 5 V tolerant; alternate functions SPI2_SCK, USART3_CTS, TIM1_CH1N. |
| 27 | PB14 | bidirectional | GPIO port B bit 14, 5 V tolerant; alternate functions SPI2_MISO, USART3_RTS, TIM1_CH2N. |
| 28 | PB15 | bidirectional | GPIO port B bit 15, 5 V tolerant; alternate functions SPI2_MOSI, TIM1_CH3N. |
| 29 | PA8 | bidirectional | GPIO port A bit 8, 5 V tolerant; alternate functions USART1_CK, TIM1_CH1, MCO. |
| 30 | PA9 | bidirectional | GPIO port A bit 9, 5 V tolerant; alternate functions USART1_TX, TIM1_CH2. |
| 31 | PA10 | bidirectional | GPIO port A bit 10, 5 V tolerant; alternate functions USART1_RX, TIM1_CH3. |
| 32 | PA11 | bidirectional | GPIO port A bit 11, 5 V tolerant; alternate functions USART1_CTS, CANRX, USBDM, TIM1_CH4. |
| 33 | PA12 | bidirectional | GPIO port A bit 12, 5 V tolerant; alternate functions USART1_RTS, CANTX, USBDP, TIM1_ETR. |
| 34 | PA13 | bidirectional | GPIO port A bit 13, 5 V tolerant; default function JTMS/SWDIO debug interface pin. |
| 35 | VSS_2 | power_in | Digital ground supply pin. |
| 36 | VDD_2 | power_in | External digital power supply pin, 2.0 to 3.6 V, for I/Os and internal regulator. |
| 37 | PA14 | bidirectional | GPIO port A bit 14, 5 V tolerant; default function JTCK/SWCLK debug interface pin. |
| 38 | PA15 | bidirectional | GPIO port A bit 15, 5 V tolerant; default function JTDI, remappable to TIM2_CH1_ETR/SPI1_NSS. |
| 39 | PB3 | bidirectional | GPIO port B bit 3, 5 V tolerant; default function JTDO, remappable to TIM2_CH2/TRACESWO/SPI1_SCK. |
| 40 | PB4 | bidirectional | GPIO port B bit 4, 5 V tolerant; default function JNTRST, remappable to TIM3_CH1/SPI1_MISO. |
| 41 | PB5 | bidirectional | GPIO port B bit 5 (standard, not 5 V tolerant); default alternate function I2C1_SMBAl, remappable to TIM3_CH2/SPI1_MOSI. |
| 42 | PB6 | bidirectional | GPIO port B bit 6, 5 V tolerant; default alternate functions I2C1_SCL, TIM4_CH1, remappable to USART1_TX. |
| 43 | PB7 | bidirectional | GPIO port B bit 7, 5 V tolerant; default alternate functions I2C1_SDA, TIM4_CH2, remappable to USART1_RX. |
| 44 | BOOT0 | input | Boot mode selection pin, sampled together with BOOT1 (PB2) at reset to select boot from user Flash, system memory or embedded SRAM. |
| 45 | PB8 | bidirectional | GPIO port B bit 8, 5 V tolerant; default alternate function TIM4_CH3, remappable to I2C1_SCL/CANRX. |
| 46 | PB9 | bidirectional | GPIO port B bit 9, 5 V tolerant; default alternate function TIM4_CH4, remappable to I2C1_SDA/CANTX. |
| 47 | VSS_3 | power_in | Digital ground supply pin. |
| 48 | VDD_3 | power_in | External digital power supply pin, 2.0 to 3.6 V, for I/Os and internal regulator; the 4.7 µF decoupling capacitor must be connected to this VDD3 pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F103C8T7 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f103c8t7-etched.step/stm32f103c8t7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f103c8t7.step/stm32f103c8t7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
4741c03c5793745c, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).