STM32F103C8T6 - Arm Cortex-M3 MCU (Blue Pill)

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6px}+.t-power{color:var(--red);background:rgba(248,81,73,.12)}.t-io{color:var(--purple);background:rgba(140,107,247,.14)}+.note{color:var(--text-2);font-size:12.5px} </style></head><body><div class=wrap>-<div class=layout>-<div class=col-text>  <div class=ident><h1>STM32F103C8T6</h1><span class=mfr>STMicroelectronics</span><span class=badge>Active</span></div> <p class=oneline>Arm Cortex-M3 32-bit MCU, 72 MHz, 64 KB Flash, 20 KB SRAM. USB, CAN, seven timers, two ADCs, nine communication interfaces. The workhorse Blue Pill microcontroller.</p>@@ -97,68 +51,29 @@ td{padding:7px 12px;border-bottom:1px solid var(--border);vertical-align:top}td.   <span class=m>Pins <b>48</b></span><span class=m>Core <b>Cortex-M3</b></span> </div> -<div class=callout style="border-left-color:var(--accent)">The interactive <b>3D model, schematic symbol, and PCB footprint</b> viewers are at the top of this page (the native component viewers). Downloadable CAD is on the Files tab: the bare-chip <code>.kicad_sym</code>, <code>.kicad_mod</code>, <code>.step</code>, and <code>.glb</code>.</div>+<div class=callout>The interactive <b>3D model, schematic symbol, PCB footprint, and datasheet</b> viewers are at the top of this page (the native component viewers). The datasheet viewer reads all 116 pages inline; downloadable CAD and the datasheet PDF are on the Files tab: the bare-chip <code>.kicad_sym</code>, <code>.kicad_mod</code>, <code>.step</code>, and <code>.glb</code>.</div>  <h2>Specifications <span class=s>microcontroller</span></h2> <div class=specgrid><div class=spec><span class=k>Core</span><span class=v>ARM Cortex-M3 <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>Max frequency</span><span class=v>72 MHz <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>Flash</span><span class=v>64 KB <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>RAM</span><span class=v>20 KB <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>GPIO</span><span class=v>37 <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>Supply (min)</span><span class=v>2 V <span class="chip c-seed">CATALOG</span></span></div><div class=spec><span class=k>Supply (max)</span><span class=v>3.6 V <span class="chip c-seed">CATALOG</span></span></div></div> <h3 style="font-size:13px;margin:16px 0 4px;color:var(--text-2)">Peripherals</h3> <div class=periphwrap><span class=periph>TIM x4 (16-bit)</span><span class=periph>ADC x2 (12-bit)</span><span class=periph>USART</span><span class=periph>SPI</span><span class=periph>I2C</span><span class=periph>CAN</span><span class=periph>USB 2.0 FS</span></div> -<h2>Pin map <span class=s>48 pins, ST datasheet via ds2sf &middot; scroll</span></h2>-<div class=pinbox><div class=pingroup><h3>POWER <span style="color:var(--text-3);font-weight:400">(9)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>1</td><td class=data>VBAT</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Backup battery supply for RTC and backup registers. Typical operating range 1.8 to 3.6 V. Supplies the RTC and backup domain when VDD is off.</td></tr><tr><td class=data>8</td><td class=data>VSSA</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Analog ground reference for ADC, reset block, PLL, and analog peripherals. Connect to digital ground at a single point.</td></tr><tr><td class=data>9</td><td class=data>VDDA</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Analog supply for ADC, reset block, PLL, and analog I/O. 2.0 to 3.6 V. Decouple with 1 µF + 10 nF close to the pin.</td></tr><tr><td class=data>23</td><td class=data>VSS_1</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 1. Connect to the ground plane; keep short return path to VDD_1 decoupling.</td></tr><tr><td class=data>24</td><td class=data>VDD_1</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 1. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr><tr><td class=data>35</td><td class=data>VSS_2</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 2. Connect to the ground plane; pair with VDD_2 decoupling.</td></tr><tr><td class=data>36</td><td class=data>VDD_2</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 2. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr><tr><td class=data>47</td><td class=data>VSS_3</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 3. Connect to the ground plane; pair with VDD_3 decoupling.</td></tr><tr><td class=data>48</td><td class=data>VDD_3</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 3. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr></tbody></table></div><div class=pingroup><h3>GPIO <span style="color:var(--text-3);font-weight:400">(26)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>2</td><td class=data>PC13-TAMPER-RTC</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 13, muxed with TAMPER input and RTC output. Supplied through the backup power switch (limited to 3 mA sink); output speed limited to 2 MHz with max 30 pF load; must not source current.</td></tr><tr><td class=data>10</td><td class=data>PA0-WKUP</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 0, 5 V-tolerant when configured as digital input. Alternate functions: standby WKUP, USART2_CTS (remap), ADC12_IN0, TIM2_CH1_ETR.</td></tr><tr><td class=data>11</td><td class=data>PA1</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 1. Alternate functions: USART2_RTS, ADC12_IN1, TIM2_CH2.</td></tr><tr><td class=data>12</td><td class=data>PA2</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 2. Alternate functions: USART2_TX, ADC12_IN2, TIM2_CH3.</td></tr><tr><td class=data>13</td><td class=data>PA3</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 3. Alternate functions: USART2_RX, ADC12_IN3, TIM2_CH4.</td></tr><tr><td class=data>14</td><td class=data>PA4</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 4. Alternate functions: SPI1_NSS, USART2_CK, ADC12_IN4.</td></tr><tr><td class=data>15</td><td class=data>PA5</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 5. Alternate functions: SPI1_SCK, ADC12_IN5.</td></tr><tr><td class=data>16</td><td class=data>PA6</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 6. Alternate functions: SPI1_MISO, ADC12_IN6, TIM3_CH1; remap: TIM1_BKIN.</td></tr><tr><td class=data>17</td><td class=data>PA7</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 7. Alternate functions: SPI1_MOSI, ADC12_IN7, TIM3_CH2; remap: TIM1_CH1N.</td></tr><tr><td class=data>18</td><td class=data>PB0</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 0. Alternate functions: ADC12_IN8, TIM3_CH3; remap: TIM1_CH2N.</td></tr><tr><td class=data>19</td><td class=data>PB1</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 1. Alternate functions: ADC12_IN9, TIM3_CH4; remap: TIM1_CH3N.</td></tr><tr><td class=data>20</td><td class=data>PB2</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 2, 5 V-tolerant. Doubles as BOOT1 boot mode selection input sampled at reset.</td></tr><tr><td class=data>21</td><td class=data>PB10</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 10, 5 V-tolerant. Alternate functions: I2C2_SCL, USART3_TX; remap: TIM2_CH3.</td></tr><tr><td class=data>22</td><td class=data>PB11</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 11, 5 V-tolerant. Alternate functions: I2C2_SDA, USART3_RX; remap: TIM2_CH4.</td></tr><tr><td class=data>25</td><td class=data>PB12</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 12, 5 V-tolerant. Alternate functions: SPI2_NSS, I2C2_SMBAl, USART3_CK, TIM1_BKIN.</td></tr><tr><td class=data>26</td><td class=data>PB13</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 13, 5 V-tolerant. Alternate functions: SPI2_SCK, USART3_CTS, TIM1_CH1N.</td></tr><tr><td class=data>27</td><td class=data>PB14</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 14, 5 V-tolerant. Alternate functions: SPI2_MISO, USART3_RTS, TIM1_CH2N.</td></tr><tr><td class=data>28</td><td class=data>PB15</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 15, 5 V-tolerant. Alternate functions: SPI2_MOSI, TIM1_CH3N.</td></tr><tr><td class=data>29</td><td class=data>PA8</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 8, 5 V-tolerant. Alternate functions: USART1_CK, TIM1_CH1, MCO (master clock output).</td></tr><tr><td class=data>30</td><td class=data>PA9</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 9, 5 V-tolerant. Alternate functions: USART1_TX, TIM1_CH2.</td></tr><tr><td class=data>31</td><td class=data>PA10</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 10, 5 V-tolerant. Alternate functions: USART1_RX, TIM1_CH3.</td></tr><tr><td class=data>41</td><td class=data>PB5</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 5 (NOT 5 V-tolerant on this pin). Alternate functions: I2C1_SMBAl; remap: TIM3_CH2, SPI1_MOSI.</td></tr><tr><td class=data>42</td><td class=data>PB6</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 6, 5 V-tolerant. Alternate functions: I2C1_SCL, TIM4_CH1; remap: USART1_TX.</td></tr><tr><td class=data>43</td><td class=data>PB7</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 7, 5 V-tolerant. Alternate functions: I2C1_SDA, TIM4_CH2; remap: USART1_RX.</td></tr><tr><td class=data>45</td><td class=data>PB8</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 8, 5 V-tolerant. Alternate functions: TIM4_CH3; remap: I2C1_SCL, CANRX.</td></tr><tr><td class=data>46</td><td class=data>PB9</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 9, 5 V-tolerant. Alternate functions: TIM4_CH4; remap: I2C1_SDA, CANTX.</td></tr></tbody></table></div><div class=pingroup><h3>TIMING <span style="color:var(--text-3);font-weight:400">(4)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>3</td><td class=data>PC14-OSC32_IN</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 14, muxed with 32 kHz LSE oscillator input (OSC32_IN). Backup-domain pin routed through the power switch; same 2 MHz / 30 pF drive limitation as PC13.</td></tr><tr><td class=data>4</td><td class=data>PC15-OSC32_OUT</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 15, muxed with 32 kHz LSE oscillator output (OSC32_OUT). Backup-domain pin routed through the power switch; same 2 MHz / 30 pF drive limitation as PC13/PC14.</td></tr><tr><td class=data>5</td><td class=data>PD0-OSC_IN</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">HSE crystal oscillator input (OSC_IN) after reset; remappable to GPIO PD0 by software. In GPIO mode limited to 50 MHz output. Connect to 4-16 MHz crystal or external clock.</td></tr><tr><td class=data>6</td><td class=data>PD1-OSC_OUT</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">HSE crystal oscillator output (OSC_OUT) after reset; remappable to GPIO PD1 by software. In GPIO mode limited to 50 MHz output.</td></tr></tbody></table></div><div class=pingroup><h3>CONTROL <span style="color:var(--text-3);font-weight:400">(2)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>7</td><td class=data>NRST</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">Active-low bidirectional device reset. Pulled low by internal or external reset sources; external pull-up recommended (typ 40 kΩ internal weak pull-up).</td></tr><tr><td class=data>44</td><td class=data>BOOT0</td><td></td><td class=note style="color:var(--text-2)">Boot mode selection input sampled at reset (with BOOT1/PB2): selects boot from Flash, System memory (bootloader), or embedded SRAM. Must be tied to a defined logic level.</td></tr></tbody></table></div><div class=pingroup><h3>USB <span style="color:var(--text-3);font-weight:400">(2)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>32</td><td class=data>PA11</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 11, 5 V-tolerant. Alternate functions: USART1_CTS, CANRX, USBDM (USB D-), TIM1_CH4.</td></tr><tr><td class=data>33</td><td class=data>PA12</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 12, 5 V-tolerant. Alternate functions: USART1_RTS, CANTX, USBDP (USB D+), TIM1_ETR.</td></tr></tbody></table></div><div class=pingroup><h3>DEBUG <span style="color:var(--text-3);font-weight:400">(5)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>34</td><td class=data>PA13</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 13, 5 V-tolerant. Default after reset: JTMS/SWDIO (serial-wire debug data/JTAG mode select). Can be released to GPIO via SWJ-DP disable.</td></tr><tr><td class=data>37</td><td class=data>PA14</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 14, 5 V-tolerant. Default after reset: JTCK/SWCLK (serial-wire debug clock/JTAG clock).</td></tr><tr><td class=data>38</td><td class=data>PA15</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 15, 5 V-tolerant. Default after reset: JTDI (JTAG data in). Remappable to TIM2_CH1_ETR/PA15/SPI1_NSS.</td></tr><tr><td class=data>39</td><td class=data>PB3</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 3, 5 V-tolerant. Default after reset: JTDO / TRACESWO. Remappable to TIM2_CH2, PB3, SPI1_SCK.</td></tr><tr><td class=data>40</td><td class=data>PB4</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 4, 5 V-tolerant. Default after reset: NJTRST (JTAG reset, active low). Remappable to TIM3_CH1, PB4, SPI1_MISO.</td></tr></tbody></table></div></div>+<h2>Pin map <span class=s>48 pins, from the ST datasheet via ds2sf</span></h2>+<div class=tblwrap><div class=pingroup><h3>POWER <span style="color:var(--text-3);font-weight:400">(9)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>1</td><td class=data>VBAT</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Backup battery supply for RTC and backup registers. Typical operating range 1.8 to 3.6 V. Supplies the RTC and backup domain when VDD is off.</td></tr><tr><td class=data>8</td><td class=data>VSSA</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Analog ground reference for ADC, reset block, PLL, and analog peripherals. Connect to digital ground at a single point.</td></tr><tr><td class=data>9</td><td class=data>VDDA</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Analog supply for ADC, reset block, PLL, and analog I/O. 2.0 to 3.6 V. Decouple with 1 µF + 10 nF close to the pin.</td></tr><tr><td class=data>23</td><td class=data>VSS_1</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 1. Connect to the ground plane; keep short return path to VDD_1 decoupling.</td></tr><tr><td class=data>24</td><td class=data>VDD_1</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 1. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr><tr><td class=data>35</td><td class=data>VSS_2</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 2. Connect to the ground plane; pair with VDD_2 decoupling.</td></tr><tr><td class=data>36</td><td class=data>VDD_2</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 2. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr><tr><td class=data>47</td><td class=data>VSS_3</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital ground, group 3. Connect to the ground plane; pair with VDD_3 decoupling.</td></tr><tr><td class=data>48</td><td class=data>VDD_3</td><td><span class="tbadge t-power">Power</span></td><td class=note style="color:var(--text-2)">Digital supply, group 3. 2.0 to 3.6 V. Decouple with 100 nF close to the pin.</td></tr></tbody></table></div><div class=pingroup><h3>GPIO <span style="color:var(--text-3);font-weight:400">(26)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>2</td><td class=data>PC13-TAMPER-RTC</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 13, muxed with TAMPER input and RTC output. Supplied through the backup power switch (limited to 3 mA sink); output speed limited to 2 MHz with max 30 pF load; must not source current.</td></tr><tr><td class=data>10</td><td class=data>PA0-WKUP</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 0, 5 V-tolerant when configured as digital input. Alternate functions: standby WKUP, USART2_CTS (remap), ADC12_IN0, TIM2_CH1_ETR.</td></tr><tr><td class=data>11</td><td class=data>PA1</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 1. Alternate functions: USART2_RTS, ADC12_IN1, TIM2_CH2.</td></tr><tr><td class=data>12</td><td class=data>PA2</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 2. Alternate functions: USART2_TX, ADC12_IN2, TIM2_CH3.</td></tr><tr><td class=data>13</td><td class=data>PA3</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 3. Alternate functions: USART2_RX, ADC12_IN3, TIM2_CH4.</td></tr><tr><td class=data>14</td><td class=data>PA4</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 4. Alternate functions: SPI1_NSS, USART2_CK, ADC12_IN4.</td></tr><tr><td class=data>15</td><td class=data>PA5</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 5. Alternate functions: SPI1_SCK, ADC12_IN5.</td></tr><tr><td class=data>16</td><td class=data>PA6</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 6. Alternate functions: SPI1_MISO, ADC12_IN6, TIM3_CH1; remap: TIM1_BKIN.</td></tr><tr><td class=data>17</td><td class=data>PA7</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 7. Alternate functions: SPI1_MOSI, ADC12_IN7, TIM3_CH2; remap: TIM1_CH1N.</td></tr><tr><td class=data>18</td><td class=data>PB0</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 0. Alternate functions: ADC12_IN8, TIM3_CH3; remap: TIM1_CH2N.</td></tr><tr><td class=data>19</td><td class=data>PB1</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 1. Alternate functions: ADC12_IN9, TIM3_CH4; remap: TIM1_CH3N.</td></tr><tr><td class=data>20</td><td class=data>PB2</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 2, 5 V-tolerant. Doubles as BOOT1 boot mode selection input sampled at reset.</td></tr><tr><td class=data>21</td><td class=data>PB10</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 10, 5 V-tolerant. Alternate functions: I2C2_SCL, USART3_TX; remap: TIM2_CH3.</td></tr><tr><td class=data>22</td><td class=data>PB11</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 11, 5 V-tolerant. Alternate functions: I2C2_SDA, USART3_RX; remap: TIM2_CH4.</td></tr><tr><td class=data>25</td><td class=data>PB12</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 12, 5 V-tolerant. Alternate functions: SPI2_NSS, I2C2_SMBAl, USART3_CK, TIM1_BKIN.</td></tr><tr><td class=data>26</td><td class=data>PB13</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 13, 5 V-tolerant. Alternate functions: SPI2_SCK, USART3_CTS, TIM1_CH1N.</td></tr><tr><td class=data>27</td><td class=data>PB14</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 14, 5 V-tolerant. Alternate functions: SPI2_MISO, USART3_RTS, TIM1_CH2N.</td></tr><tr><td class=data>28</td><td class=data>PB15</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 15, 5 V-tolerant. Alternate functions: SPI2_MOSI, TIM1_CH3N.</td></tr><tr><td class=data>29</td><td class=data>PA8</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 8, 5 V-tolerant. Alternate functions: USART1_CK, TIM1_CH1, MCO (master clock output).</td></tr><tr><td class=data>30</td><td class=data>PA9</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 9, 5 V-tolerant. Alternate functions: USART1_TX, TIM1_CH2.</td></tr><tr><td class=data>31</td><td class=data>PA10</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 10, 5 V-tolerant. Alternate functions: USART1_RX, TIM1_CH3.</td></tr><tr><td class=data>41</td><td class=data>PB5</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 5 (NOT 5 V-tolerant on this pin). Alternate functions: I2C1_SMBAl; remap: TIM3_CH2, SPI1_MOSI.</td></tr><tr><td class=data>42</td><td class=data>PB6</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 6, 5 V-tolerant. Alternate functions: I2C1_SCL, TIM4_CH1; remap: USART1_TX.</td></tr><tr><td class=data>43</td><td class=data>PB7</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 7, 5 V-tolerant. Alternate functions: I2C1_SDA, TIM4_CH2; remap: USART1_RX.</td></tr><tr><td class=data>45</td><td class=data>PB8</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 8, 5 V-tolerant. Alternate functions: TIM4_CH3; remap: I2C1_SCL, CANRX.</td></tr><tr><td class=data>46</td><td class=data>PB9</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 9, 5 V-tolerant. Alternate functions: TIM4_CH4; remap: I2C1_SDA, CANTX.</td></tr></tbody></table></div><div class=pingroup><h3>TIMING <span style="color:var(--text-3);font-weight:400">(4)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>3</td><td class=data>PC14-OSC32_IN</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 14, muxed with 32 kHz LSE oscillator input (OSC32_IN). Backup-domain pin routed through the power switch; same 2 MHz / 30 pF drive limitation as PC13.</td></tr><tr><td class=data>4</td><td class=data>PC15-OSC32_OUT</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port C bit 15, muxed with 32 kHz LSE oscillator output (OSC32_OUT). Backup-domain pin routed through the power switch; same 2 MHz / 30 pF drive limitation as PC13/PC14.</td></tr><tr><td class=data>5</td><td class=data>PD0-OSC_IN</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">HSE crystal oscillator input (OSC_IN) after reset; remappable to GPIO PD0 by software. In GPIO mode limited to 50 MHz output. Connect to 4-16 MHz crystal or external clock.</td></tr><tr><td class=data>6</td><td class=data>PD1-OSC_OUT</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">HSE crystal oscillator output (OSC_OUT) after reset; remappable to GPIO PD1 by software. In GPIO mode limited to 50 MHz output.</td></tr></tbody></table></div><div class=pingroup><h3>CONTROL <span style="color:var(--text-3);font-weight:400">(2)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>7</td><td class=data>NRST</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">Active-low bidirectional device reset. Pulled low by internal or external reset sources; external pull-up recommended (typ 40 kΩ internal weak pull-up).</td></tr><tr><td class=data>44</td><td class=data>BOOT0</td><td></td><td class=note style="color:var(--text-2)">Boot mode selection input sampled at reset (with BOOT1/PB2): selects boot from Flash, System memory (bootloader), or embedded SRAM. Must be tied to a defined logic level.</td></tr></tbody></table></div><div class=pingroup><h3>USB <span style="color:var(--text-3);font-weight:400">(2)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>32</td><td class=data>PA11</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 11, 5 V-tolerant. Alternate functions: USART1_CTS, CANRX, USBDM (USB D-), TIM1_CH4.</td></tr><tr><td class=data>33</td><td class=data>PA12</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 12, 5 V-tolerant. Alternate functions: USART1_RTS, CANTX, USBDP (USB D+), TIM1_ETR.</td></tr></tbody></table></div><div class=pingroup><h3>DEBUG <span style="color:var(--text-3);font-weight:400">(5)</span></h3><table><thead><tr><th style=width:44px>Pin</th><th style=width:170px>Name</th><th style=width:70px>Type</th><th>Function (datasheet)</th></tr></thead><tbody><tr><td class=data>34</td><td class=data>PA13</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 13, 5 V-tolerant. Default after reset: JTMS/SWDIO (serial-wire debug data/JTAG mode select). Can be released to GPIO via SWJ-DP disable.</td></tr><tr><td class=data>37</td><td class=data>PA14</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 14, 5 V-tolerant. Default after reset: JTCK/SWCLK (serial-wire debug clock/JTAG clock).</td></tr><tr><td class=data>38</td><td class=data>PA15</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port A bit 15, 5 V-tolerant. Default after reset: JTDI (JTAG data in). Remappable to TIM2_CH1_ETR/PA15/SPI1_NSS.</td></tr><tr><td class=data>39</td><td class=data>PB3</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 3, 5 V-tolerant. Default after reset: JTDO / TRACESWO. Remappable to TIM2_CH2, PB3, SPI1_SCK.</td></tr><tr><td class=data>40</td><td class=data>PB4</td><td><span class="tbadge t-io">I/O</span></td><td class=note style="color:var(--text-2)">GPIO port B bit 4, 5 V-tolerant. Default after reset: NJTRST (JTAG reset, active low). Remappable to TIM3_CH1, PB4, SPI1_MISO.</td></tr></tbody></table></div></div>  <h2>Provenance</h2> <div class=callout>Pin functions extracted by <b>ds2sf</b> from the ST datasheet (116 pages, sha256 0596dd57693c, source lcsc); Claude cites pages and refuses to fabricate, flagging muxed pins for review. CAD from KiCad official libraries (CC-BY-SA 4.0). Symbol regenerated from the ds2sf extraction, function-grouped. 3D board-context composed with cadquery (FR4 + copper pads + solder + pin 1) and rendered via step2glb. Datasheet: <a href="https://www.st.com/resource/en/datasheet/stm32f103cb.pdf" target=_blank>ST STM32F103x8/xB</a>.</div>--</div><!-- /col-text -->--<aside class=col-doc>-<div class=doc>-  <div class=doc-head><span class=lab id=doc-label>Features</span><span class=doc-nav><button id=doc-prev aria-label=Previous>&lsaquo;</button><span id=doc-count>1 / 5</span><button id=doc-next aria-label=Next>&rsaquo;</button></span></div>-  <div class=doc-body>