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Publish 0.2.2

Colby Knox ·4a78df89c7 ·3mo ago ·parent 7d720eb
3 files changed +56−4
package.json+2−2
@@ -1,6 +1,6 @@ {   "slug": "stm32f103c8t6",-  "version": "0.2.1",+  "version": "0.2.2",   "type": "component",   "description": "STMicroelectronics mainstream Arm Cortex-M3 MCU. 72 MHz, 64 KB Flash, 20 KB SRAM, USB, CAN, LQFP-48. The workhorse Blue Pill microcontroller.",   "dependencies": {},@@ -29,5 +29,5 @@     "path": "screenshots/hero.png"   },   "org": "adom",-  "changelog": "0.2.1: mark stm32f103c8t6-usage user-invocable."+  "changelog": "0.2.2: add stm32f103c8t6-flashing (SWD/OpenOCD, UART ROM bootloader, the no-ROM-DFU gotcha, RDP unlock). Second skill: the #46 upgrade-delivery probe." }\ No newline at end of file
page.json+2−2
@@ -4,7 +4,7 @@   "slug": "stm32f103c8t6",   "title": "STM32F103C8T6 - Arm Cortex-M3 MCU (Blue Pill)",   "brief": "STMicroelectronics mainstream Arm Cortex-M3 MCU. 72 MHz, 64 KB Flash, 20 KB SRAM, USB, CAN, LQFP-48. The workhorse Blue Pill microcontroller.",-  "version": "0.2.1",+  "version": "0.2.2",   "tags": [     "component",     "microcontroller",@@ -97,5 +97,5 @@     "screenshots/hero.png",     "docs/stm32f103c8.pdf"   ],-  "changelog": "0.2.1: mark stm32f103c8t6-usage user-invocable."+  "changelog": "0.2.2: add stm32f103c8t6-flashing (SWD/OpenOCD, UART ROM bootloader, the no-ROM-DFU gotcha, RDP unlock). Second skill: the #46 upgrade-delivery probe." }\ No newline at end of file
skills/stm32f103c8t6-flashing/SKILL.mdadded+52
@@ -0,0 +1,52 @@+---+name: stm32f103c8t6-flashing+user-invocable: true+description: "Use when programming an STM32F103C8T6: flashing over SWD with OpenOCD or ST-Link, entering the ROM UART bootloader with BOOT0, why USB DFU does not work on a bare F103, and clearing readout protection. Triggers: flash the stm32, program blue pill, stm32 bootloader, BOOT0 flashing, openocd stm32, st-link, stm32 dfu not working."+---++# STM32F103C8T6 flashing++Two hardware paths exist on a bare F103: SWD, and the ROM UART bootloader.+USB is NOT one of them (see the gotcha below).++## SWD (preferred)++Wire SWDIO (PA13, pin 34), SWCLK (PA14, pin 37), NRST, 3V3, GND to an+ST-Link or compatible probe, then:++```+openocd -f interface/stlink.cfg -f target/stm32f1x.cfg \+  -c "program firmware.elf verify reset exit"+```++Works regardless of BOOT0 and does not disturb running clocks. If the chip+was put into a deep-sleep loop by bad firmware, hold NRST low while OpenOCD+connects (connect-under-reset).++## ROM UART bootloader++Strap BOOT0 high, reset, and the ROM bootloader listens on USART1: PA9 (TX)+and PA10 (RX), 3.3 V logic, even parity. Flash with stm32flash or+STM32CubeProgrammer, then strap BOOT0 back low and reset. Useful when no+debug probe is available; needs only a USB-UART adapter.++## The USB gotcha++The F103's ROM bootloader speaks USART1 ONLY. A bare F103 cannot be flashed+over USB: no ROM DFU exists on this family (that arrived on later parts).+Boards that flash over USB (many Blue Pill variants) do it through a+SOFTWARE bootloader (stm32duino/Maple) that someone previously flashed via+SWD or UART. If USB flashing "stopped working", the software bootloader was+erased: recover over SWD or the UART ROM loader.++## Readout protection++If a previous firmware set RDP, SWD reads fail and programming errors out.+Clear it (this MASS-ERASES flash):++```+openocd -f interface/stlink.cfg -f target/stm32f1x.cfg \+  -c "init; reset halt; stm32f1x unlock 0; reset run; exit"+```++Power-cycle after unlocking; RDP state latches until a full reset.