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STM32F042K6U6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+67@@ -0,0 +1,67 @@+# STM32F042K6U6TR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)++STM32F042K6U6TR from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Digital power supply, 2.0 to 3.6 V |+| 2 | PF0-OSC_IN | bidirectional | GPIO or external oscillator input for 4-32 MHz crystal with CRS_SYNC and I2C1_SDA alternate functions |+| 3 | PF1-OSC_OUT | bidirectional | GPIO or external oscillator output for crystal with I2C1_SCL alternate function |+| 4 | NRST | bidirectional | Device reset input / internal reset output (active low) with embedded weak pull-up resistor |+| 5 | VDDA | power_in | Analog power supply, from VDD to 3.6 V (2.4 V minimum if ADC is used), must be >= VDD |+| 6 | PA0 | bidirectional | TTa I/O with USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1, RTC_TAMP2, WKUP1, ADC_IN0 alternate functions |+| 7 | PA1 | bidirectional | TTa I/O with USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT, ADC_IN1 alternate functions |+| 8 | PA2 | bidirectional | TTa I/O with USART2_TX, TIM2_CH3, TSC_G1_IO3, ADC_IN2, WKUP4 alternate functions |+| 9 | PA3 | bidirectional | TTa I/O with USART2_RX, TIM2_CH4, TSC_G1_IO4, ADC_IN3 alternate functions |+| 10 | PA4 | bidirectional | TTa I/O with SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK, USB_NOE, ADC_IN4 alternate functions |+| 11 | PA5 | bidirectional | TTa I/O with SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, ADC_IN5 alternate functions |+| 12 | PA6 | bidirectional | TTa I/O with SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, TSC_G2_IO3, EVENTOUT, ADC_IN6 alternate functions |+| 13 | PA7 | bidirectional | TTa I/O with SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, TSC_G2_IO4, EVENTOUT, ADC_IN7 alternate functions |+| 14 | PB0 | bidirectional | TTa I/O with TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, ADC_IN8 alternate functions |+| 15 | PB1 | bidirectional | TTa I/O with TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3, ADC_IN9 alternate functions |+| 16 | PB2 | bidirectional | FT 5V-tolerant I/O with TSC_G3_IO4 alternate function for capacitive sensing |+| 17 | VDDIO2 | power_in | I/O power supply for high-performance I/Os, 1.65 to 3.6 V, independent from VDD but VDD must be present first |+| 18 | PA8 | bidirectional | FT I/O supplied by VDDIO2 with USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC alternate functions |+| 19 | PA9 | bidirectional | FTf I/O supplied by VDDIO2 with USART1_TX, TIM1_CH2, TSC_G4_IO1, I2C1_SCL alternate functions |+| 20 | PA10 | bidirectional | FTf I/O supplied by VDDIO2 with USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA alternate functions |+| 21 | PA11 | bidirectional | FTf I/O supplied by VDDIO2 with CAN_RX, USART1_CTS, TIM1_CH4, TSC_G4_IO3, EVENTOUT, I2C1_SCL, USB_DM alternate functions; can be remapped to PA9 position using SYSCFG_CFGR1 |+| 22 | PA12 | bidirectional | FTf I/O supplied by VDDIO2 with CAN_TX, USART1_RTS, TIM1_ETR, TSC_G4_IO4, EVENTOUT, I2C1_SDA, USB_DP alternate functions; can be remapped to PA10 position using SYSCFG_CFGR1 |+| 23 | PA13 | bidirectional | FT I/O supplied by VDDIO2 configured as SWDIO at reset with IR_OUT, USB_NOE alternate functions |+| 24 | PA14 | bidirectional | FT I/O supplied by VDDIO2 configured as SWCLK at reset with USART2_TX alternate function |+| 25 | PA15 | bidirectional | FT I/O supplied by VDDIO2 with SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT, USB_NOE alternate functions |+| 26 | PB3 | bidirectional | FT I/O with SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT alternate functions |+| 27 | PB4 | bidirectional | FT I/O with SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT alternate functions |+| 28 | PB5 | bidirectional | FT I/O with SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2, WKUP6 alternate functions |+| 29 | PB6 | bidirectional | FTf I/O with I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3 alternate functions |+| 30 | PB7 | bidirectional | FTf I/O with I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4 alternate functions |+| 0 | VSS/VSSA (Exposed Pad) | power_in | Ground for analog and digital domains, exposed die pad on underside of package must be soldered to PCB ground |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-32(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `STM32F042K6U6TR`+- Footprint: `Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm`+- 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `stm32f042k6u6tr-etched.step` / `stm32f042k6u6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f042k6u6tr.step` / `stm32f042k6u6tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901606733176832) (117 pp, sha256 `7af7ec8f5a596b23`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f042k6u6tr-datasheet.pdf)
page.jsonadded+280@@ -0,0 +1,280 @@+{+ "slug": "stm32f042k6u6tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f042k6u6tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f042k6u6tr.kicad_sym",+ "stm32f042k6u6tr.kicad_mod",+ "stm32f042k6u6tr.glb",+ "stm32f042k6u6tr.step",+ "stm32f042k6u6tr.lbr",+ "docs/hero.png",+ "docs/stm32f042k6u6tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "STM32F042K6U6TR",+ "manufacturer": "STMicroelectronics",+ "package": "UFQFPN-32(5x5)",+ "pin_count": 31,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901606733176832",+ "parts": {+ "symbol": "stm32f042k6u6tr.kicad_sym",+ "footprint": "stm32f042k6u6tr.kicad_mod",+ "model_3d": "stm32f042k6u6tr-etched.glb",+ "model_3d_plain": "stm32f042k6u6tr.glb",+ "model_3d_step": "stm32f042k6u6tr-etched.step",+ "model_3d_step_plain": "stm32f042k6u6tr.step",+ "lbr": "stm32f042k6u6tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2053439",+ "digikey": "497-19321-2-ND",+ "mouser": "511-STM32F042K6U6TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T18:08:48Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-19321-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F042K6U6TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply, 2.0 to 3.6 V"+ },+ {+ "number": "2",+ "name": "PF0-OSC_IN",+ "type": "bidirectional",+ "description": "GPIO or external oscillator input for 4-32 MHz crystal with CRS_SYNC and I2C1_SDA alternate functions"+ },+ {+ "number": "3",+ "name": "PF1-OSC_OUT",+ "type": "bidirectional",+ "description": "GPIO or external oscillator output for crystal with I2C1_SCL alternate function"+ },+ {+ "number": "4",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Device reset input / internal reset output (active low) with embedded weak pull-up resistor"+ },+ {+ "number": "5",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply, from VDD to 3.6 V (2.4 V minimum if ADC is used), must be >= VDD"+ },+ {+ "number": "6",+ "name": "PA0",+ "type": "bidirectional",+ "description": "TTa I/O with USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1, RTC_TAMP2, WKUP1, ADC_IN0 alternate functions"+ },+ {+ "number": "7",+ "name": "PA1",+ "type": "bidirectional",+ "description": "TTa I/O with USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT, ADC_IN1 alternate functions"+ },+ {+ "number": "8",+ "name": "PA2",+ "type": "bidirectional",+ "description": "TTa I/O with USART2_TX, TIM2_CH3, TSC_G1_IO3, ADC_IN2, WKUP4 alternate functions"+ },+ {+ "number": "9",+ "name": "PA3",+ "type": "bidirectional",+ "description": "TTa I/O with USART2_RX, TIM2_CH4, TSC_G1_IO4, ADC_IN3 alternate functions"+ },+ {+ "number": "10",+ "name": "PA4",+ "type": "bidirectional",+ "description": "TTa I/O with SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK, USB_NOE, ADC_IN4 alternate functions"+ },+ {+ "number": "11",+ "name": "PA5",+ "type": "bidirectional",+ "description": "TTa I/O with SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, ADC_IN5 alternate functions"+ },+ {+ "number": "12",+ "name": "PA6",+ "type": "bidirectional",+ "description": "TTa I/O with SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, TSC_G2_IO3, EVENTOUT, ADC_IN6 alternate functions"+ },+ {+ "number": "13",+ "name": "PA7",+ "type": "bidirectional",+ "description": "TTa I/O with SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, TSC_G2_IO4, EVENTOUT, ADC_IN7 alternate functions"+ },+ {+ "number": "14",+ "name": "PB0",+ "type": "bidirectional",+ "description": "TTa I/O with TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, ADC_IN8 alternate functions"+ },+ {+ "number": "15",+ "name": "PB1",+ "type": "bidirectional",+ "description": "TTa I/O with TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3, ADC_IN9 alternate functions"+ },+ {+ "number": "16",+ "name": "PB2",+ "type": "bidirectional",+ "description": "FT 5V-tolerant I/O with TSC_G3_IO4 alternate function for capacitive sensing"+ },+ {+ "number": "17",+ "name": "VDDIO2",+ "type": "power_in",+ "description": "I/O power supply for high-performance I/Os, 1.65 to 3.6 V, independent from VDD but VDD must be present first"+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "FT I/O supplied by VDDIO2 with USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC alternate functions"+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "FTf I/O supplied by VDDIO2 with USART1_TX, TIM1_CH2, TSC_G4_IO1, I2C1_SCL alternate functions"+ },+ {+ "number": "20",+ "name": "PA10",+ "type": "bidirectional",+ "description": "FTf I/O supplied by VDDIO2 with USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA alternate functions"+ },+ {+ "number": "21",+ "name": "PA11",+ "type": "bidirectional",+ "description": "FTf I/O supplied by VDDIO2 with CAN_RX, USART1_CTS, TIM1_CH4, TSC_G4_IO3, EVENTOUT, I2C1_SCL, USB_DM alternate functions; can be remapped to PA9 position using SYSCFG_CFGR1"+ },+ {+ "number": "22",+ "name": "PA12",+ "type": "bidirectional",+ "description": "FTf I/O supplied by VDDIO2 with CAN_TX, USART1_RTS, TIM1_ETR, TSC_G4_IO4, EVENTOUT, I2C1_SDA, USB_DP alternate functions; can be remapped to PA10 position using SYSCFG_CFGR1"+ },+ {+ "number": "23",+ "name": "PA13",+ "type": "bidirectional",+ "description": "FT I/O supplied by VDDIO2 configured as SWDIO at reset with IR_OUT, USB_NOE alternate functions"+ },+ {+ "number": "24",+ "name": "PA14",+ "type": "bidirectional",+ "description": "FT I/O supplied by VDDIO2 configured as SWCLK at reset with USART2_TX alternate function"+ },+ {+ "number": "25",+ "name": "PA15",+ "type": "bidirectional",+ "description": "FT I/O supplied by VDDIO2 with SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT, USB_NOE alternate functions"+ },+ {+ "number": "26",+ "name": "PB3",+ "type": "bidirectional",+ "description": "FT I/O with SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT alternate functions"+ },+ {+ "number": "27",+ "name": "PB4",+ "type": "bidirectional",+ "description": "FT I/O with SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT alternate functions"+ },+ {+ "number": "28",+ "name": "PB5",+ "type": "bidirectional",+ "description": "FT I/O with SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2, WKUP6 alternate functions"+ },+ {+ "number": "29",+ "name": "PB6",+ "type": "bidirectional",+ "description": "FTf I/O with I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3 alternate functions"+ },+ {+ "number": "30",+ "name": "PB7",+ "type": "bidirectional",+ "description": "FTf I/O with I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4 alternate functions"+ },+ {+ "number": "0",+ "name": "VSS/VSSA (Exposed Pad)",+ "type": "power_in",+ "description": "Ground for analog and digital domains, exposed die pad on underside of package must be soldered to PCB ground"+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901606733176832",+ "pages": 117,+ "sha256": "7af7ec8f5a596b23",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 31,+ "described": 31,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}