component
STM32C071KBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "stm32c071kbt6",
"title": "STM32C071KBT6",
"brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"stm32c071kbt6",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "STM32C071KBT6",
"manufacturer": "STMicroelectronics",
"package": "LQFP-32(7x7)",
"pin_count": 32,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.st.com/resource/en/datasheet/stm32c071kbt6.pdf",
"parts": {
"symbol": "stm32c071kbt6.kicad_sym",
"footprint": "stm32c071kbt6.kicad_mod",
"model_3d": "stm32c071kbt6-hero.glb",
"model_3d_plain": "stm32c071kbt6.glb",
"model_3d_step": "stm32c071kbt6-etched.step",
"model_3d_step_plain": "stm32c071kbt6.step",
"lbr": "stm32c071kbt6.lbr"
},
"distributor_links": {
"lcsc": "C42116633",
"digikey": "497-STM32C071KBT6-ND",
"mouser": "511-STM32C071KBT6"
},
"distributor_check": {
"checked_at": "2026-10-10T21:39:52Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-STM32C071KBT6-ND",
"status": "found"
},
"mouser": {
"pn": "511-STM32C071KBT6",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PB9",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB9 after reset; alternate functions include IR_OUT, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM3_CH2, SPI2_NSS, I2C1_SDA and EVENTOUT."
},
{
"number": "2",
"name": "PC14-OSCX_IN",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PC14 after reset; additional function OSCX_IN, alternate functions include USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM3_CH2, SPI2_NSS, I2C1_SDA and EVENTOUT."
},
{
"number": "3",
"name": "PC15-OSCX_OUT",
"type": "bidirectional",
"description": "5 V-tolerant I/O (FT), default function PC15 after reset; additional function OSCX_OUT, alternate functions include OSC32_EN, OSC_EN, TIM1_ETR and TIM3_CH3."
},
{
"number": "4",
"name": "VDD/VDDA",
"type": "power_in",
"description": "Standard operating voltage 2.0 V to 3.6 V for the device and the analog supply (VDDA); decouple with 100 nF plus 4.7 µF ceramic capacitors placed close to the pins as shown in Figure 14."
},
{
"number": "5",
"name": "VSS/VSSA",
"type": "power_in",
"description": "Ground reference for the device and the analog supply (VSSA); all voltages are referenced to VSS."
},
{
"number": "6",
"name": "PF2-NRST",
"type": "bidirectional",
"description": "Reset pin with RST I/O structure and embedded weak pull-up when configured as reset, becoming a 5 V-tolerant FT GPIO when configured as PF2; alternate functions are MCO and TIM1_CH4, and an external 0.1 µF filter capacitor is recommended on NRST."
},
{
"number": "7",
"name": "PA0",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA0 after reset; additional functions ADC_IN0 and WKUP1, alternate functions include SPI2_SCK, USART2_CTS/USART2_NSS, TIM16_CH1, TIM2_ETR/TIM2_CH1, USART1_TX and TIM1_CH1."
},
{
"number": "8",
"name": "PA1",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA1 after reset; additional function ADC_IN1, alternate functions include SPI1_SCK/I2S1_CK, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM2_CH2, USART1_RX, TIM1_CH2, I2C1_SMBA and EVENTOUT."
},
{
"number": "9",
"name": "PA2",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA2 after reset; additional functions ADC_IN2, WKUP4 and LSCO, alternate functions include SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3 and TIM2_CH3."
},
{
"number": "10",
"name": "PA3",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA3 after reset; additional function ADC_IN3, alternate functions include SPI2_MISO, USART2_RX, TIM1_CH1N, TIM2_CH4, TIM1_CH4 and EVENTOUT."
},
{
"number": "11",
"name": "PA4",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA4 after reset; additional functions ADC_IN4, RTC_TS, RTC_OUT1 and WKUP2, alternate functions include SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, SPI2_MOSI, TIM14_CH1, TIM17_CH1N, USB_NOE and EVENTOUT."
},
{
"number": "12",
"name": "PA5",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PA5 after reset; additional function ADC_IN5, alternate functions include SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM2_ETR/TIM2_CH1, TIM1_CH1 and EVENTOUT."
},
{
"number": "13",
"name": "PA6",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa), default function PA6 after reset; additional function ADC_IN6, alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 and I2C2_SDA."
},
{
"number": "14",
"name": "PA7",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa), default function PA7 after reset; additional function ADC_IN7, alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and I2C2_SCL."
},
{
"number": "15",
"name": "PB0",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PB0 after reset; additional function ADC_IN17, alternate functions include SPI1_NSS/I2S1_WS, TIM3_CH3 and TIM1_CH2N."
},
{
"number": "16",
"name": "PB1",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PB1 after reset; additional function ADC_IN18, alternate functions include TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N and EVENTOUT."
},
{
"number": "17",
"name": "PB2",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_a), default function PB2 after reset; additional function ADC_IN19, alternate functions include USART1_RX, MCO2, SPI2_MISO and EVENTOUT."
},
{
"number": "18",
"name": "PA8",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); default function PA8 after reset, additional function ADC_IN8, alternate functions include MCO, USART2_TX, TIM1_CH1, SPI2_NSS, CRS_SYNC, SPI2_MISO, EVENTOUT, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX and MCO2."
},
{
"number": "19",
"name": "PA9",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_sf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA9 after reset; alternate functions include MCO, USART1_TX, TIM1_CH2, TIM3_ETR, SPI2_MISO, I2C1_SCL, EVENTOUT and I2C2_SCL, and it can be remapped in place of PA11 using SYSCFG_CFGR1."
},
{
"number": "20",
"name": "PC6",
"type": "bidirectional",
"description": "5 V-tolerant I/O (FT_s) supplied by VDDIO2 (internally tied to VDD on the GP package), default function PC6 after reset; alternate functions include TIM3_CH1 and TIM2_CH3. This pin is PC6 on the GP version only."
},
{
"number": "21",
"name": "PA10",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_sf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA10 after reset; alternate functions include SPI2_MOSI, USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT and I2C2_SDA, and it can be remapped in place of PA12 using SYSCFG_CFGR1."
},
{
"number": "22",
"name": "PA11 [PA9]",
"type": "bidirectional",
"description": "5 V-tolerant USB-capable I/O with Fm+ capability (FT_usf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA11 after reset with PA9 as remap; alternate functions include SPI1_MISO/I2S1_MCK, USART1_CTS/USART1_NSS, TIM1_CH4, TIM1_BKIN2 and I2C2_SCL, and additional function USB_DM."
},
{
"number": "23",
"name": "PA12 [PA10]",
"type": "bidirectional",
"description": "5 V-tolerant USB-capable I/O with Fm+ capability (FT_usf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA12 after reset with PA10 as remap; alternate functions include SPI1_MOSI/I2S1_SD, USART1_RTS/USART1_DE/USART1_CK, TIM1_ETR, I2S_CKIN and I2C2_SDA, and additional function USB_DP."
},
{
"number": "24",
"name": "PA13",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); after reset it is the SWDIO function with an internal pull-up enabled, additional function ADC_IN13, and alternate functions include IR_OUT, USB_NOE, TIM3_ETR, USART2_RX and EVENTOUT."
},
{
"number": "25",
"name": "PA14-BOOT0",
"type": "bidirectional",
"description": "5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); after reset it is the SWCLK function with an internal pull-down enabled, additional functions ADC_IN14 and BOOT0, and alternate functions include USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2 and USART1_RTS/USART1_DE/USART1_CK."
},
{
"number": "26",
"name": "PA15",
"type": "bidirectional",
"description": "5 V-tolerant I/O (FT_s) supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA15 after reset; alternate functions include SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS/USART1_DE/USART1_CK, TIM2_ETR/TIM2_CH1, USB_NOE and EVENTOUT."
},
{
"number": "27",
"name": "PB3",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB3 after reset; alternate functions include SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS/USART1_DE/USART1_CK, I2C2_SCL, TIM2_CH2 and EVENTOUT."
},
{
"number": "28",
"name": "PB4",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB4 after reset; alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS/USART1_NSS, TIM17_BKIN, I2C2_SDA and EVENTOUT."
},
{
"number": "29",
"name": "PB5",
"type": "bidirectional",
"description": "5 V-tolerant I/O (FT), default function PB5 after reset; additional function WKUP6, alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3 and I2C1_SMBA."
},
{
"number": "30",
"name": "PB6",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB6 after reset; additional function WKUP3, alternate functions include USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, SPI2_MISO, USART1_NSS/USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI1_MISO/I2S1_MCK, SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH1, TIM3_CH2, TIM16_BKIN and TIM17_BKIN."
},
{
"number": "31",
"name": "PB7",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB7 after reset; additional function RTC_REFIN, alternate functions include USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, SPI2_MOSI, I2C1_SDA, EVENTOUT, USART2_CTS/USART2_NSS, TIM16_CH1, TIM3_CH1 and I2C1_SCL."
},
{
"number": "32",
"name": "PB8",
"type": "bidirectional",
"description": "5 V-tolerant I/O with Fm+ capability (FT_f), default function PB8 after reset; alternate functions include USART2_CTS/USART2_NSS, TIM16_CH1, TIM3_CH1, SPI2_SCK, I2C1_SCL and EVENTOUT."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN STM32C071KBT6 has no 'N' suffix, so the GP version of the LQFP32 pinout (Figure 6 GP, Table 12 '; Pin 6 (PF2-NRST) is typed bidirectional because the datasheet lists it as an I/O with RST structure;; The GP LQFP32 package has no VDDIO2 pin. Pins marked FT_s/FT_sf/FT_sa/FT_usf are supplied by VDDIO2,"
],
"pages_sent": 66,
"cost_usd": 0.291,
"at": "2026-10-10T21:39:29"
},
"datasheet": {
"url": "https://www.st.com/resource/en/datasheet/stm32c071kbt6.pdf",
"pages": 129,
"sha256": "47df10c3b7af4b1b",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 32,
"described": 32,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "stm32c071kbt6.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "stm32c071kbt6-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "9d64099fd942c87320a70b949bd5bbeeac08901f912d94619ca407ec9638184a",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "STMicroelectronics",
"Package": "LQFP-32(7x7)",
"Category": "Embedded Processors & Controllers",
"Pins": "32"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"stm32c071kbt6"
],
"discovery_pitch": "STM32C071KBT6 (STMicroelectronics) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"stm32c071kbt6.kicad_mod",
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"stm32c071kbt6.lbr",
"docs/hero.png",
"docs/stm32c071kbt6-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"stm32c071kbt6-hero.glb",
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],
"visibility": {
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}
}