Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

STM32C071KBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32C071KBT6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB9 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB9 after reset; alternate functions include IR_OUT, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM3_CH2, SPI2_NSS, I2C1_SDA and EVENTOUT.
2 PC14-OSCX_IN bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PC14 after reset; additional function OSCX_IN, alternate functions include USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM3_CH2, SPI2_NSS, I2C1_SDA and EVENTOUT.
3 PC15-OSCX_OUT bidirectional 5 V-tolerant I/O (FT), default function PC15 after reset; additional function OSCX_OUT, alternate functions include OSC32_EN, OSC_EN, TIM1_ETR and TIM3_CH3.
4 VDD/VDDA power_in Standard operating voltage 2.0 V to 3.6 V for the device and the analog supply (VDDA); decouple with 100 nF plus 4.7 µF ceramic capacitors placed close to the pins as shown in Figure 14.
5 VSS/VSSA power_in Ground reference for the device and the analog supply (VSSA); all voltages are referenced to VSS.
6 PF2-NRST bidirectional Reset pin with RST I/O structure and embedded weak pull-up when configured as reset, becoming a 5 V-tolerant FT GPIO when configured as PF2; alternate functions are MCO and TIM1_CH4, and an external 0.1 µF filter capacitor is recommended on NRST.
7 PA0 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA0 after reset; additional functions ADC_IN0 and WKUP1, alternate functions include SPI2_SCK, USART2_CTS/USART2_NSS, TIM16_CH1, TIM2_ETR/TIM2_CH1, USART1_TX and TIM1_CH1.
8 PA1 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA1 after reset; additional function ADC_IN1, alternate functions include SPI1_SCK/I2S1_CK, USART2_RTS/USART2_DE/USART2_CK, TIM17_CH1, TIM2_CH2, USART1_RX, TIM1_CH2, I2C1_SMBA and EVENTOUT.
9 PA2 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA2 after reset; additional functions ADC_IN2, WKUP4 and LSCO, alternate functions include SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3 and TIM2_CH3.
10 PA3 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA3 after reset; additional function ADC_IN3, alternate functions include SPI2_MISO, USART2_RX, TIM1_CH1N, TIM2_CH4, TIM1_CH4 and EVENTOUT.
11 PA4 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA4 after reset; additional functions ADC_IN4, RTC_TS, RTC_OUT1 and WKUP2, alternate functions include SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, SPI2_MOSI, TIM14_CH1, TIM17_CH1N, USB_NOE and EVENTOUT.
12 PA5 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PA5 after reset; additional function ADC_IN5, alternate functions include SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM2_ETR/TIM2_CH1, TIM1_CH1 and EVENTOUT.
13 PA6 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa), default function PA6 after reset; additional function ADC_IN6, alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 and I2C2_SDA.
14 PA7 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa), default function PA7 after reset; additional function ADC_IN7, alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and I2C2_SCL.
15 PB0 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PB0 after reset; additional function ADC_IN17, alternate functions include SPI1_NSS/I2S1_WS, TIM3_CH3 and TIM1_CH2N.
16 PB1 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PB1 after reset; additional function ADC_IN18, alternate functions include TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N and EVENTOUT.
17 PB2 bidirectional 5 V-tolerant I/O with analog switch (FT_a), default function PB2 after reset; additional function ADC_IN19, alternate functions include USART1_RX, MCO2, SPI2_MISO and EVENTOUT.
18 PA8 bidirectional 5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); default function PA8 after reset, additional function ADC_IN8, alternate functions include MCO, USART2_TX, TIM1_CH1, SPI2_NSS, CRS_SYNC, SPI2_MISO, EVENTOUT, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX and MCO2.
19 PA9 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_sf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA9 after reset; alternate functions include MCO, USART1_TX, TIM1_CH2, TIM3_ETR, SPI2_MISO, I2C1_SCL, EVENTOUT and I2C2_SCL, and it can be remapped in place of PA11 using SYSCFG_CFGR1.
20 PC6 bidirectional 5 V-tolerant I/O (FT_s) supplied by VDDIO2 (internally tied to VDD on the GP package), default function PC6 after reset; alternate functions include TIM3_CH1 and TIM2_CH3. This pin is PC6 on the GP version only.
21 PA10 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_sf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA10 after reset; alternate functions include SPI2_MOSI, USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT and I2C2_SDA, and it can be remapped in place of PA12 using SYSCFG_CFGR1.
22 PA11 [PA9] bidirectional 5 V-tolerant USB-capable I/O with Fm+ capability (FT_usf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA11 after reset with PA9 as remap; alternate functions include SPI1_MISO/I2S1_MCK, USART1_CTS/USART1_NSS, TIM1_CH4, TIM1_BKIN2 and I2C2_SCL, and additional function USB_DM.
23 PA12 [PA10] bidirectional 5 V-tolerant USB-capable I/O with Fm+ capability (FT_usf), supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA12 after reset with PA10 as remap; alternate functions include SPI1_MOSI/I2S1_SD, USART1_RTS/USART1_DE/USART1_CK, TIM1_ETR, I2S_CKIN and I2C2_SDA, and additional function USB_DP.
24 PA13 bidirectional 5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); after reset it is the SWDIO function with an internal pull-up enabled, additional function ADC_IN13, and alternate functions include IR_OUT, USB_NOE, TIM3_ETR, USART2_RX and EVENTOUT.
25 PA14-BOOT0 bidirectional 5 V-tolerant I/O with analog switch (FT_sa), supplied by VDDIO2 (internally tied to VDD on the GP package); after reset it is the SWCLK function with an internal pull-down enabled, additional functions ADC_IN14 and BOOT0, and alternate functions include USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2 and USART1_RTS/USART1_DE/USART1_CK.
26 PA15 bidirectional 5 V-tolerant I/O (FT_s) supplied by VDDIO2 (internally tied to VDD on the GP package), default function PA15 after reset; alternate functions include SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS/USART1_DE/USART1_CK, TIM2_ETR/TIM2_CH1, USB_NOE and EVENTOUT.
27 PB3 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB3 after reset; alternate functions include SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS/USART1_DE/USART1_CK, I2C2_SCL, TIM2_CH2 and EVENTOUT.
28 PB4 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB4 after reset; alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS/USART1_NSS, TIM17_BKIN, I2C2_SDA and EVENTOUT.
29 PB5 bidirectional 5 V-tolerant I/O (FT), default function PB5 after reset; additional function WKUP6, alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3 and I2C1_SMBA.
30 PB6 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB6 after reset; additional function WKUP3, alternate functions include USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, SPI2_MISO, USART1_NSS/USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI1_MISO/I2S1_MCK, SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH1, TIM3_CH2, TIM16_BKIN and TIM17_BKIN.
31 PB7 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB7 after reset; additional function RTC_REFIN, alternate functions include USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, SPI2_MOSI, I2C1_SDA, EVENTOUT, USART2_CTS/USART2_NSS, TIM16_CH1, TIM3_CH1 and I2C1_SCL.
32 PB8 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f), default function PB8 after reset; alternate functions include USART2_CTS/USART2_NSS, TIM16_CH1, TIM3_CH1, SPI2_SCK, I2C1_SCL and EVENTOUT.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32C071KBT6
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32c071kbt6-etched.step / stm32c071kbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32c071kbt6.step / stm32c071kbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (129 pp, sha256 47df10c3b7af4b1b, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF