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Ray Initial commit: component/std5nk40zt4 fc8eccd 5d ago

STD5NK40ZT4

STMicroelectronics · MOSFETs · DPAK

STD5NK40ZT4 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal for MOSFET switching control with maximum gate-source voltage ±30V and integrated Zener diode protection.
2 Drain passive Drain terminal rated for maximum 400V drain-source voltage; connected to case tab for thermal dissipation path.
3 Source power_in Source terminal providing reference potential for gate and drain voltages; typical return path connection.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STD5NK40ZT4
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std5nk40zt4-etched.step / std5nk40zt4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std5nk40zt4.step / std5nk40zt4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (13 pp, sha256 471b445d2f8e7e19, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF