component
STD5N95K3
Public Made by Adomby adom
STMicroelectronics MOSFETs, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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std5n95k3: specified limits as data (metadata.characteristics, 42 rows from the datasheet)
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23d ago
STD5N95K3
STMicroelectronics · MOSFETs · DPAK
STD5N95K3 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate control input; ±30 V maximum gate-source voltage with integrated Zener diode protection rated to 30 V breakdown voltage. |
| 2 | D | passive | Drain terminal with heat sink tab connection; 950 V maximum drain-source voltage, 4 A maximum continuous drain current at TC = 25 °C. |
| 3 | S | passive | Source terminal; 4 A maximum continuous source-drain current with integrated back-to-back Zener diode protection to gate. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -30 | 30 | V | 3 | ||
| Drain current (continuous) | ID | 4 | A | TC = 25 °C | 3 | ||
| Drain current (continuous) | ID | 3 | A | TC = 100 °C | 3 | ||
| Drain current (pulsed) | IDM | 16 | A | Pulse width limited by safe operating area | 3 | ||
| Total dissipation | PTOT | 90 | W | TC = 25 °C | 3 | ||
| Avalanche current, repetitive or not-repetitive | IAR | 4 | A | Pulse width limited by TJ max | 3 | ||
| Single pulse avalanche energy | EAS | 100 | mJ | Starting TJ = 25 °C, ID = IAR, VDD = 50 V | 3 | ||
| Peak diode recovery voltage slope | dv/dt | 5 | V/ns | ISD ≤ 4 A, di/dt ≤ 100 A/µs, peak VDS ≤ V(BR)DSS | 3 | ||
| Operating junction temperature | TJ | -55 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 3 | ||
| Thermal resistance junction-case max | Rthj-case | 1.39 | °C/W | 3 | |||
| Thermal resistance junction-ambient max | Rthj-amb | 62.5 | °C/W | 3 | |||
| Thermal resistance junction-pcb max | Rthj-pcb | 50 | °C/W | 1 inch² FR-4 board, 2 oz Cu | 3 | ||
| Drain-source breakdown voltage | V(BR)DSS | 950 | V | ID = 1 mA, VGS = 0 | 4 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VGS = 0, VDS = 950 V | 4 | ||
| Zero gate voltage drain current | IDSS | 50 | µA | VGS = 0, VDS = 950 V, TC = 125 °C | 4 | ||
| Gate-body leakage current | IGSS | -10 | 10 | µA | VDS = 0, VGS = ±20 V | 4 | |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 100 µA | 4 |
| Static drain-source on-resistance | RDS(on) | 3 | 3.5 | Ω | VGS = 10 V, ID = 2 A | 4 | |
| Source-drain current | ISD | 4 | A | 5 | |||
| Source-drain current (pulsed) | ISDM | 16 | A | Pulse width limited by safe operating area | 5 | ||
| Forward on voltage | VSD | 1.6 | V | ISD = 4 A, VGS = 0 | 5 | ||
| Gate-source breakdown voltage | V(BR)GSO | 30 | V | IGS = ±1 mA, ID = 0 | 5 | ||
| Input capacitance | Ciss | 460 | pF | VDS = 25 V, f = 1 MHz, VGS = 0 | 4 | ||
| Output capacitance | Coss | 38 | pF | 4 | |||
| Reverse transfer capacitance | Crss | 1 | pF | 4 | |||
| Equivalent capacitance time related | Co(tr) | 970 | pF | VDS = 0 to 760 V, VGS = 0 | 4 | ||
| Equivalent capacitance energy related | Co(er) | 15 | pF | VDS = 0 to 760 V, VGS = 0 | 4 | ||
| Gate input resistance | Rg | 5.5 | Ω | f = 1 MHz, ID = 0 | 4 | ||
| Total gate charge | Qg | 19 | nC | VDD = 760 V, ID = 4 A, VGS = 10 V | 4 | ||
| Gate-source charge | Qgs | 4.7 | nC | 4 | |||
| Gate-drain charge | Qgd | 12 | nC | 4 | |||
| Turn-on delay time | td(on) | 17 | ns | VDD = 475 V, ID = 2 A, RG = 4.7 Ω, VGS = 10 V | 5 | ||
| Rise time | tr | 7 | ns | 5 | |||
| Turn-off-delay time | td(off) | 32 | ns | 5 | |||
| Fall time | tf | 18 | ns | 5 | |||
| Reverse recovery time | trr | 410 | ns | ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V | 5 | ||
| Reverse recovery charge | Qrr | 3.5 | µC | 5 | |||
| Reverse recovery current | IRRM | 17 | A | 5 | |||
| Reverse recovery time | trr | 516 | ns | ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C | 5 | ||
| Reverse recovery charge | Qrr | 4.1 | µC | 5 | |||
| Reverse recovery current | IRRM | 16 | A | 5 |
CAD (KiCad official)
- Symbol:
STD5N95K3 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
std5n95k3-etched.step/std5n95k3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);std5n95k3.step/std5n95k3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (23 pp, sha256
06c2aa85fd7a5e5b, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STD5N95K3
**STMicroelectronics** · MOSFETs · DPAK
STD5N95K3 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate control input; ±30 V maximum gate-source voltage with integrated Zener diode protection rated to 30 V breakdown voltage. |
| 2 | D | passive | Drain terminal with heat sink tab connection; 950 V maximum drain-source voltage, 4 A maximum continuous drain current at TC = 25 °C. |
| 3 | S | passive | Source terminal; 4 A maximum continuous source-drain current with integrated back-to-back Zener diode protection to gate. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -30 | | 30 | V | | 3 |
| Drain current (continuous) | ID | | | 4 | A | TC = 25 °C | 3 |
| Drain current (continuous) | ID | | | 3 | A | TC = 100 °C | 3 |
| Drain current (pulsed) | IDM | | | 16 | A | Pulse width limited by safe operating area | 3 |
| Total dissipation | PTOT | | | 90 | W | TC = 25 °C | 3 |
| Avalanche current, repetitive or not-repetitive | IAR | | | 4 | A | Pulse width limited by TJ max | 3 |
| Single pulse avalanche energy | EAS | | | 100 | mJ | Starting TJ = 25 °C, ID = IAR, VDD = 50 V | 3 |
| Peak diode recovery voltage slope | dv/dt | | | 5 | V/ns | ISD ≤ 4 A, di/dt ≤ 100 A/µs, peak VDS ≤ V(BR)DSS | 3 |
| Operating junction temperature | TJ | -55 | | 150 | °C | | 3 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 3 |
| Thermal resistance junction-case max | Rthj-case | | | 1.39 | °C/W | | 3 |
| Thermal resistance junction-ambient max | Rthj-amb | | | 62.5 | °C/W | | 3 |
| Thermal resistance junction-pcb max | Rthj-pcb | | | 50 | °C/W | 1 inch² FR-4 board, 2 oz Cu | 3 |
| Drain-source breakdown voltage | V(BR)DSS | 950 | | | V | ID = 1 mA, VGS = 0 | 4 |
| Zero gate voltage drain current | IDSS | | | 1 | µA | VGS = 0, VDS = 950 V | 4 |
| Zero gate voltage drain current | IDSS | | | 50 | µA | VGS = 0, VDS = 950 V, TC = 125 °C | 4 |
| Gate-body leakage current | IGSS | -10 | | 10 | µA | VDS = 0, VGS = ±20 V | 4 |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 100 µA | 4 |
| Static drain-source on-resistance | RDS(on) | | 3 | 3.5 | Ω | VGS = 10 V, ID = 2 A | 4 |
| Source-drain current | ISD | | | 4 | A | | 5 |
| Source-drain current (pulsed) | ISDM | | | 16 | A | Pulse width limited by safe operating area | 5 |
| Forward on voltage | VSD | | | 1.6 | V | ISD = 4 A, VGS = 0 | 5 |
| Gate-source breakdown voltage | V(BR)GSO | 30 | | | V | IGS = ±1 mA, ID = 0 | 5 |
| Input capacitance | Ciss | | 460 | | pF | VDS = 25 V, f = 1 MHz, VGS = 0 | 4 |
| Output capacitance | Coss | | 38 | | pF | | 4 |
| Reverse transfer capacitance | Crss | | 1 | | pF | | 4 |
| Equivalent capacitance time related | Co(tr) | | 970 | | pF | VDS = 0 to 760 V, VGS = 0 | 4 |
| Equivalent capacitance energy related | Co(er) | | 15 | | pF | VDS = 0 to 760 V, VGS = 0 | 4 |
| Gate input resistance | Rg | | 5.5 | | Ω | f = 1 MHz, ID = 0 | 4 |
| Total gate charge | Qg | | 19 | | nC | VDD = 760 V, ID = 4 A, VGS = 10 V | 4 |
| Gate-source charge | Qgs | | 4.7 | | nC | | 4 |
| Gate-drain charge | Qgd | | 12 | | nC | | 4 |
| Turn-on delay time | td(on) | | 17 | | ns | VDD = 475 V, ID = 2 A, RG = 4.7 Ω, VGS = 10 V | 5 |
| Rise time | tr | | 7 | | ns | | 5 |
| Turn-off-delay time | td(off) | | 32 | | ns | | 5 |
| Fall time | tf | | 18 | | ns | | 5 |
| Reverse recovery time | trr | | 410 | | ns | ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V | 5 |
| Reverse recovery charge | Qrr | | 3.5 | | µC | | 5 |
| Reverse recovery current | IRRM | | 17 | | A | | 5 |
| Reverse recovery time | trr | | 516 | | ns | ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C | 5 |
| Reverse recovery charge | Qrr | | 4.1 | | µC | | 5 |
| Reverse recovery current | IRRM | | 16 | | A | | 5 |
## CAD (KiCad official)
- Symbol: `STD5N95K3`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files: `std5n95k3-etched.step` / `std5n95k3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `std5n95k3.step` / `std5n95k3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590225853612392448) (23 pp, sha256 `06c2aa85fd7a5e5b`, retrieved 2026-09-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/std5n95k3-datasheet.pdf)