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STD3NK60Z-1

Public Made by Adom

by adom

STMicroelectronics MOSFETs, IPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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STD3NK60Z-1

STMicroelectronics · MOSFETs · IPAK

STD3NK60Z-1 from STMicroelectronics, in a IPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the Zener-protected N-channel SuperMESH power MOSFET, with gate-source voltage limited to ±30 V and built-in back-to-back Zener protection.
2 D passive Drain of the N-channel MOSFET, rated for 600 V drain-source voltage and 2.4 A continuous drain current at TC = 25 °C, with the TAB also connected to drain.
3 S passive Source of the N-channel MOSFET, with source-drain current limited to 2.4 A continuous and 9.6 A pulsed.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package IPAK
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 600 V ID = 1 mA, VGS = 0 V 3
Zero gate voltage drain current IDSS 1 µA VGS = 0 V, VDS = 600 V 3
Zero gate voltage drain current at TC = 125 °C IDSS 50 µA VGS = 0 V, VDS = 600 V, TC = 125 °C 3
Gate body leakage current IGSS -10 10 µA VDS = 0 V, VGS = ±20 V 3
Gate threshold voltage VGS(th) 3 3.75 4.5 V VDS = VGS, ID = 50 µA 3
Static drain-source on resistance RDS(on) 3.2 3.6 Ω VGS = 10 V, ID = 1.2 A 3
Gate-source breakdown voltage V(BR)GSO -30 30 V IGS = ±1 mA, ID = 0 A 4
Source-drain current ISD 2.4 A 4
Source-drain current (pulsed) ISDM 9.6 A 4
Drain-source voltage VDS 600 V 2
Gate-source voltage VGS -30 30 V 2
Drain current (continuous) at TC = 25 °C ID 2.4 A TC = 25 °C 2
Drain current (continuous) at TC = 100 °C ID 1.51 A TC = 100 °C 2
Drain current (pulsed) IDM 9.6 A Pulse width limited by safe operating area 2
Total dissipation at TC = 25 °C PTOT 45 W TC = 25 °C 2
ESD gate-source human body model ESD 2.1 kV R = 1.5 kΩ, C = 100 pF 2
Insulation withstand voltage (RMS) VISO 2.5 kV From all three leads to external heat-sink, t = 1 s, TC = 25 °C 2
Peak diode recovery voltage slope dv/dt 4.5 V/ns ISD ≤ 2.4 A, di/dt ≤ 200 A/µs, VDD = 80% V(BR)DSS 2
Operating junction temperature range Tj -55 150 °C 2
Avalanche current, repetitive or not-repetitive IAR 2.4 A Pulse width limited by Tj max 2
Single pulse avalanche energy EAS 150 mJ Starting Tj = 25 °C, ID = IAR, VDD = 50 V 2

CAD (KiCad official)

  • Symbol: STD3NK60Z-1
  • Footprint: Package_TO_SOT_THT:TO-251-3_Vertical
  • 3D model: IPAK (KiCad packages3D, STEP)
  • 3D model files: std3nk60z-1-etched.step / std3nk60z-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std3nk60z-1.step / std3nk60z-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (34 pp, sha256 55a910d3e7811f76, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF