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STD105N10F7AG
Public Made by Adomby adom
STMicroelectronics MOSFETs, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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std105n10f7ag: specified limits as data (metadata.characteristics, 18 rows from the datasheet)
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STD105N10F7AG
STMicroelectronics · MOSFETs · DPAK
STD105N10F7AG from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the MOSFET, with gate-source voltage VGS rated at ±20 V (Table 2). |
| 2 | D | passive | Drain terminal, rated for 100 V drain-source voltage and 80 A continuous drain current at TC = 25 °C; it is also connected to the metal tab (D(2, TAB) in Figure 1). |
| 3 | S | passive | Source terminal; the source-drain diode is rated for 80 A continuous source-drain current (ISD) with a forward voltage of 1.2 V at ISD = 80 A and VGS = 0 V (Table 8). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | 100 | V | 3 | |||
| Gate-source voltage | VGS | -20 | 20 | V | 3 | ||
| Drain current (continuous) | ID | 80 | A | TC = 25 °C | 3 | ||
| Drain current (continuous) | ID | 62 | A | TC = 100 °C | 3 | ||
| Drain current (pulsed) | IDM | 320 | A | Pulse width limited by safe operating area | 3 | ||
| Total dissipation | PTOT | 120 | W | TC = 25 °C | 3 | ||
| Storage temperature range | Tstg | -55 | 175 | °C | 3 | ||
| Drain-source breakdown voltage | V(BR)DSS | 100 | V | ID = 250 μA, VGS = 0 | 4 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VDS = 100 V | 4 | ||
| Zero gate voltage drain current (TC = 125 °C) | IDSS | 100 | µA | VDS = 100 V, TC = 125 °C | 4 | ||
| Gate body leakage current | IGSS | -100 | 100 | nA | VGS = ± 20 V | 4 | |
| Gate threshold voltage | VGS(th) | 2.5 | 4.5 | V | VDS = VGS, ID = 250 μA | 4 | |
| Static drain-source on-resistance | RDS(on) | 6.8 | 8 | mΩ | VGS = 10 V, ID = 40 A | 4 | |
| Source-drain current | ISD | 80 | A | 5 | |||
| Source-drain current (pulsed) | ISDM | 320 | A | 5 | |||
| Thermal resistance junction-case | Rthj-case | 1.25 | °C/W | 3 | |||
| Thermal resistance junction-pcb | Rthj-pcb | 50 | °C/W | When mounted on FR-4 board of 1 inch², 2oz Cu | 3 | ||
| Single pulse avalanche energy | EAS | 400 | mJ | TJ = 25 °C, L = 3.5 mH, IAS = 15 A, VDD = 50 V, VGS = 10 V | 3 |
CAD (KiCad official)
- Symbol:
STD105N10F7AG - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
std105n10f7ag-etched.step/std105n10f7ag-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);std105n10f7ag.step/std105n10f7ag.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (14 pp, sha256
0c02e6d78b239f15, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STD105N10F7AG
**STMicroelectronics** · MOSFETs · DPAK
STD105N10F7AG from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the MOSFET, with gate-source voltage VGS rated at ±20 V (Table 2). |
| 2 | D | passive | Drain terminal, rated for 100 V drain-source voltage and 80 A continuous drain current at TC = 25 °C; it is also connected to the metal tab (D(2, TAB) in Figure 1). |
| 3 | S | passive | Source terminal; the source-drain diode is rated for 80 A continuous source-drain current (ISD) with a forward voltage of 1.2 V at ISD = 80 A and VGS = 0 V (Table 8). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | | | 100 | V | | 3 |
| Gate-source voltage | VGS | -20 | | 20 | V | | 3 |
| Drain current (continuous) | ID | | | 80 | A | TC = 25 °C | 3 |
| Drain current (continuous) | ID | | | 62 | A | TC = 100 °C | 3 |
| Drain current (pulsed) | IDM | | | 320 | A | Pulse width limited by safe operating area | 3 |
| Total dissipation | PTOT | | | 120 | W | TC = 25 °C | 3 |
| Storage temperature range | Tstg | -55 | | 175 | °C | | 3 |
| Drain-source breakdown voltage | V(BR)DSS | 100 | | | V | ID = 250 μA, VGS = 0 | 4 |
| Zero gate voltage drain current | IDSS | | | 1 | µA | VDS = 100 V | 4 |
| Zero gate voltage drain current (TC = 125 °C) | IDSS | | | 100 | µA | VDS = 100 V, TC = 125 °C | 4 |
| Gate body leakage current | IGSS | -100 | | 100 | nA | VGS = ± 20 V | 4 |
| Gate threshold voltage | VGS(th) | 2.5 | | 4.5 | V | VDS = VGS, ID = 250 μA | 4 |
| Static drain-source on-resistance | RDS(on) | | 6.8 | 8 | mΩ | VGS = 10 V, ID = 40 A | 4 |
| Source-drain current | ISD | | | 80 | A | | 5 |
| Source-drain current (pulsed) | ISDM | | | 320 | A | | 5 |
| Thermal resistance junction-case | Rthj-case | | 1.25 | | °C/W | | 3 |
| Thermal resistance junction-pcb | Rthj-pcb | | 50 | | °C/W | When mounted on FR-4 board of 1 inch², 2oz Cu | 3 |
| Single pulse avalanche energy | EAS | | 400 | | mJ | TJ = 25 °C, L = 3.5 mH, IAS = 15 A, VDD = 50 V, VGS = 10 V | 3 |
## CAD (KiCad official)
- Symbol: `STD105N10F7AG`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files: `std105n10f7ag-etched.step` / `std105n10f7ag-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `std105n10f7ag.step` / `std105n10f7ag.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/std105n10f7ag.pdf) (14 pp, sha256 `0c02e6d78b239f15`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/std105n10f7ag-datasheet.pdf)