component
STCH03TR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STCH03TR
STMicroelectronics · AC-DC Controllers And Regulators · SO-8
STCH03TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HV | input | High-voltage start-up input able to withstand 650 V with internal 7 mA current source charging the VDD capacitor at 50 V typ. until VDD reaches 17 V typ. turn-on threshold. |
| 2 | NC | unconnected | Not internally connected provision for PCB clearance to meet safety requirements. |
| 3 | FB | input | Control input for peak current control with burst-mode activation at 65 mV below VFBB threshold and maximum current sense threshold at VFBH level. |
| 4 | ZCD | input | Transformer demagnetization sensing input for quasi-resonant operation triggered by negative-going edge with maximum sink/source current of 3 mA and no capacitor connection allowed. |
| 5 | SENSE | input | Current sense input with internal 380 ns blanking time after gate-drive, compared with reference derived from FB pin voltage to determine MOSFET turn-off. |
| 6 | GND | power_in | Circuit ground reference and current return for both signal part and gate-drive. |
| 7 | GD | output | Gate-driver output with totem pole configuration for external power MOSFET. |
| 8 | VDD | power_in | Supply voltage input requiring electrolytic capacitor between VDD and GND plus 0.1 μF bypass capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
STCH03TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
stch03tr-etched.step/stch03tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stch03tr.step/stch03tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (27 pp, sha256
fc41ad1ced0066f6, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STCH03TR
**STMicroelectronics** · AC-DC Controllers And Regulators · SO-8
STCH03TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HV | input | High-voltage start-up input able to withstand 650 V with internal 7 mA current source charging the VDD capacitor at 50 V typ. until VDD reaches 17 V typ. turn-on threshold. |
| 2 | NC | unconnected | Not internally connected provision for PCB clearance to meet safety requirements. |
| 3 | FB | input | Control input for peak current control with burst-mode activation at 65 mV below VFBB threshold and maximum current sense threshold at VFBH level. |
| 4 | ZCD | input | Transformer demagnetization sensing input for quasi-resonant operation triggered by negative-going edge with maximum sink/source current of 3 mA and no capacitor connection allowed. |
| 5 | SENSE | input | Current sense input with internal 380 ns blanking time after gate-drive, compared with reference derived from FB pin voltage to determine MOSFET turn-off. |
| 6 | GND | power_in | Circuit ground reference and current return for both signal part and gate-drive. |
| 7 | GD | output | Gate-driver output with totem pole configuration for external power MOSFET. |
| 8 | VDD | power_in | Supply voltage input requiring electrolytic capacitor between VDD and GND plus 0.1 μF bypass capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `STCH03TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `stch03tr-etched.step` / `stch03tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stch03tr.step` / `stch03tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602926314634825728) (27 pp, sha256 `fc41ad1ced0066f6`, retrieved 2026-10-03, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stch03tr-datasheet.pdf)