component
STCH03TR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# STCH03TR++**STMicroelectronics** · AC-DC Controllers And Regulators · SO-8++STCH03TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | HV | input | High-voltage start-up input able to withstand 650 V with internal 7 mA current source charging the VDD capacitor at 50 V typ. until VDD reaches 17 V typ. turn-on threshold. |+| 2 | NC | unconnected | Not internally connected provision for PCB clearance to meet safety requirements. |+| 3 | FB | input | Control input for peak current control with burst-mode activation at 65 mV below VFBB threshold and maximum current sense threshold at VFBH level. |+| 4 | ZCD | input | Transformer demagnetization sensing input for quasi-resonant operation triggered by negative-going edge with maximum sink/source current of 3 mA and no capacitor connection allowed. |+| 5 | SENSE | input | Current sense input with internal 380 ns blanking time after gate-drive, compared with reference derived from FB pin voltage to determine MOSFET turn-off. |+| 6 | GND | power_in | Circuit ground reference and current return for both signal part and gate-drive. |+| 7 | GD | output | Gate-driver output with totem pole configuration for external power MOSFET. |+| 8 | VDD | power_in | Supply voltage input requiring electrolytic capacitor between VDD and GND plus 0.1 μF bypass capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `STCH03TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)+- 3D model files: `stch03tr-etched.step` / `stch03tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stch03tr.step` / `stch03tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602926314634825728) (27 pp, sha256 `fc41ad1ced0066f6`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stch03tr-datasheet.pdf)
page.jsonadded+158@@ -0,0 +1,158 @@+{+ "slug": "stch03tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics AC-DC Controllers And Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "stch03tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stch03tr.kicad_sym",+ "stch03tr.kicad_mod",+ "stch03tr.glb",+ "stch03tr.step",+ "stch03tr.lbr",+ "docs/hero.png",+ "docs/stch03tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stch03tr-hero.glb",+ "stch03tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STCH03TR",+ "manufacturer": "STMicroelectronics",+ "package": "SO-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "AC-DC Controllers And Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602926314634825728",+ "parts": {+ "symbol": "stch03tr.kicad_sym",+ "footprint": "stch03tr.kicad_mod",+ "model_3d": "stch03tr-hero.glb",+ "model_3d_plain": "stch03tr.glb",+ "model_3d_step": "stch03tr-etched.step",+ "model_3d_step_plain": "stch03tr.step",+ "lbr": "stch03tr.lbr"+ },+ "distributor_links": {+ "lcsc": 2970185,+ "digikey": "497-18077-2-ND",+ "mouser": "511-STCH03TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T05:35:05Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-18077-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STCH03TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "HV",+ "type": "input",+ "description": "High-voltage start-up input able to withstand 650 V with internal 7 mA current source charging the VDD capacitor at 50 V typ. until VDD reaches 17 V typ. turn-on threshold."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "Not internally connected provision for PCB clearance to meet safety requirements."+ },+ {+ "number": "3",+ "name": "FB",+ "type": "input",+ "description": "Control input for peak current control with burst-mode activation at 65 mV below VFBB threshold and maximum current sense threshold at VFBH level."+ },+ {+ "number": "4",+ "name": "ZCD",+ "type": "input",+ "description": "Transformer demagnetization sensing input for quasi-resonant operation triggered by negative-going edge with maximum sink/source current of 3 mA and no capacitor connection allowed."+ },+ {+ "number": "5",+ "name": "SENSE",+ "type": "input",+ "description": "Current sense input with internal 380 ns blanking time after gate-drive, compared with reference derived from FB pin voltage to determine MOSFET turn-off."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Circuit ground reference and current return for both signal part and gate-drive."+ },+ {+ "number": "7",+ "name": "GD",+ "type": "output",+ "description": "Gate-driver output with totem pole configuration for external power MOSFET."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage input requiring electrolytic capacitor between VDD and GND plus 0.1 μF bypass capacitor."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 8,+ "cost_usd": 0.0732,+ "at": "2026-10-03T05:34:45"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602926314634825728",+ "pages": 27,+ "sha256": "fc41ad1ced0066f6",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}