STC8C2K48S4-36I-LQFP32

{
  "schema_version": 1,
  "type": "component",
  "slug": "stc8c2k48s4-36i-lqfp32",
  "title": "STC8C2K48S4-36I-LQFP32",
  "brief": "STC Micro Microcontroller Units (MCUs/MPUs/SOCs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "single chip microcomputer-microcontroller",
    "stc8c2k48s4-36i-lqfp32",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "STC8C2K48S4-36I-LQFP32",
    "manufacturer": "STC Micro",
    "package": "LQFP-32(7x7)",
    "pin_count": 32,
    "category": "Single Chip Microcomputer/Microcontroller",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/73d58be2ee34ecb6692592c0f184ce32.pdf",
    "parts": {
      "symbol": "stc8c2k48s4-36i-lqfp32.kicad_sym",
      "footprint": "stc8c2k48s4-36i-lqfp32.kicad_mod",
      "model_3d": "stc8c2k48s4-36i-lqfp32-hero.glb",
      "model_3d_plain": "stc8c2k48s4-36i-lqfp32-etched.glb",
      "model_3d_step": "stc8c2k48s4-36i-lqfp32-etched.step",
      "model_3d_step_plain": "stc8c2k48s4-36i-lqfp32.step",
      "lbr": "stc8c2k48s4-36i-lqfp32.lbr"
    },
    "distributor_links": {
      "lcsc": "C3013126"
    },
    "distributor_check": {
      "checked_at": "2026-10-27T08:39:08Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.0/RxD2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.0 that also serves as the UART2 receive input RxD2; it is in high-impedance input state after power-on."
      },
      {
        "number": "2",
        "name": "P1.1/TxD2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.1 that also serves as the UART2 transmit output TxD2; it is in high-impedance input state after power-on."
      },
      {
        "number": "3",
        "name": "P1.2/SS/T2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.2 that also serves as the SPI slave-select SS (output when master) and the external clock input of Timer 2."
      },
      {
        "number": "4",
        "name": "P1.3/MOSI/T2CLKO",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.3 that also serves as SPI MOSI (master out, slave in) and the Timer 2 divided clock output T2CLKO."
      },
      {
        "number": "5",
        "name": "P1.4/MISO/SDA",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.4 that also serves as SPI MISO (master in, slave out) and the I2C data line SDA."
      },
      {
        "number": "6",
        "name": "P1.5/SCLK/SCL",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.5 that also serves as the SPI clock SCLK and the I2C clock line SCL."
      },
      {
        "number": "7",
        "name": "P1.6/RxD_3/XTALO/MCLKO_2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.6 that also serves as the UART1 receive input RxD_3, the external crystal output XTALO and the divided main clock output MCLKO_2."
      },
      {
        "number": "8",
        "name": "P1.7/TxD_3/XTALI",
        "type": "bidirectional",
        "description": "Standard I/O port pin P1.7 that also serves as the UART1 transmit output TxD_3 and the external crystal or external clock input XTALI."
      },
      {
        "number": "9",
        "name": "P5.4/RST/MCLKO",
        "type": "bidirectional",
        "description": "Standard I/O port pin P5.4 that can be configured in ISP as the active-low reset input RST, and also outputs the divided main clock MCLKO; its internal 4K pull-up is on continuously when used as reset."
      },
      {
        "number": "10",
        "name": "Vcc",
        "type": "power_in",
        "description": "Positive supply pin; the device operates from 1.9V to 5.5V, with a 10uF-or-larger plus 0.1uF decoupling capacitor recommended close to Vcc and Gnd."
      },
      {
        "number": "11",
        "name": "P5.5",
        "type": "bidirectional",
        "description": "Standard I/O port pin P5.5, in high-impedance input state after power-on until its mode is configured."
      },
      {
        "number": "12",
        "name": "Gnd",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "13",
        "name": "P3.0/RxD/INT4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.0 that also serves as the UART1 receive input RxD and external interrupt 4 (falling edge only); it is in weak pull-up quasi-bidirectional mode after power-on and is used for ISP download."
      },
      {
        "number": "14",
        "name": "P3.1/TxD",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.1 that also serves as the UART1 transmit output TxD; it is in weak pull-up quasi-bidirectional mode after power-on and is used for ISP download."
      },
      {
        "number": "15",
        "name": "P3.2/INT0/SCLK_4/SCL_4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.2 that also serves as external interrupt 0 (rising and falling edge) and the alternate SPI clock SCLK_4 and I2C clock SCL_4; P3.0, P3.1 and P3.2 must not all be low at power-up unless USB download is intended."
      },
      {
        "number": "16",
        "name": "P3.3/INT1/MISO_4/SDA_4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.3 that also serves as external interrupt 1 (rising and falling edge) and the alternate SPI MISO_4 and I2C data line SDA_4."
      },
      {
        "number": "17",
        "name": "P3.4/T0/T1CLKO/MOSI_4/CMPO",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.4 that also serves as the Timer 0 external clock input T0, the Timer 1 divided clock output T1CLKO, the alternate SPI MOSI_4 and the comparator output CMPO."
      },
      {
        "number": "18",
        "name": "P3.5/T1/T0CLKO/SS_4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.5 that also serves as the Timer 1 external clock input T1, the Timer 0 divided clock output T0CLKO and the alternate SPI slave-select SS_4."
      },
      {
        "number": "19",
        "name": "P3.6/INT2/WR_2/RxD_2/CMP-",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.6 that also serves as external interrupt 2 (falling edge only), the external bus write strobe WR_2, the UART1 receive input RxD_2 and the comparator negative input CMP-."
      },
      {
        "number": "20",
        "name": "P3.7/INT3/RD_2/TxD_2/CMP+",
        "type": "bidirectional",
        "description": "Standard I/O port pin P3.7 that also serves as external interrupt 3 (falling edge only), the external bus read strobe RD_2, the UART1 transmit output TxD_2 and the comparator positive input CMP+."
      },
      {
        "number": "21",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.0, in high-impedance input state after power-on until its mode is configured."
      },
      {
        "number": "22",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.1, in high-impedance input state after power-on until its mode is configured."
      },
      {
        "number": "23",
        "name": "P2.2/SS_2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.2 that also serves as the alternate SPI slave-select SS_2."
      },
      {
        "number": "24",
        "name": "P2.3/MOSI_2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.3 that also serves as the alternate SPI MOSI_2."
      },
      {
        "number": "25",
        "name": "P2.4/MISO_2/I2CSDA_2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.4 that also serves as the alternate SPI MISO_2 and I2C data line SDA_2."
      },
      {
        "number": "26",
        "name": "P2.5/SCLK_2/I2CSCL_2",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.5 that also serves as the alternate SPI clock SCLK_2 and I2C clock line SCL_2."
      },
      {
        "number": "27",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.6, in high-impedance input state after power-on until its mode is configured."
      },
      {
        "number": "28",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "Standard I/O port pin P2.7, in high-impedance input state after power-on until its mode is configured."
      },
      {
        "number": "29",
        "name": "P0.0/RxD3",
        "type": "bidirectional",
        "description": "Standard I/O port pin P0.0 that also serves as the UART3 receive input RxD3 and bus line AD0."
      },
      {
        "number": "30",
        "name": "P0.1/TxD3",
        "type": "bidirectional",
        "description": "Standard I/O port pin P0.1 that also serves as the UART3 transmit output TxD3 and bus line AD1."
      },
      {
        "number": "31",
        "name": "P0.2/RxD4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P0.2 that also serves as the UART4 receive input RxD4 and bus line AD2."
      },
      {
        "number": "32",
        "name": "P0.3/TxD4",
        "type": "bidirectional",
        "description": "Standard I/O port pin P0.3 that also serves as the UART4 transmit output TxD4 and bus line AD3."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet pinout for LQFP32/QFN32 is given only for STC8C2K64S4 (pages 15, 29) and STC8C2K64S2 ("
        ],
        "pages_sent": 181,
        "cost_usd": 0.2447,
        "at": "2026-10-27T08:38:29"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/73d58be2ee34ecb6692592c0f184ce32.pdf",
        "pages": 956,
        "sha256": "f8fa5bab02998432",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stc8c2k48s4-36i-lqfp32.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stc8c2k48s4-36i-lqfp32-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "c9179f6fc89261971cfc463de495616a8524c062fff8009512b13eee651429a8",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "STC Micro",
      "Package": "LQFP-32(7x7)",
      "Category": "Single Chip Microcomputer/Microcontroller",
      "Pins": "32"
    },
    "appearance": {
      "housing": {
        "quote": "Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following",
        "page": 419,
        "doc": "ds.pdf",
        "material": "PC"
      },
      "version": 1,
      "datasheet_sha256": "f8fa5bab02998432942309872fdf828c68941a093f210adf4d7877010a37a8d3"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "stc8c2k48s4-36i-lqfp32"
  ],
  "discovery_pitch": "STC8C2K48S4-36I-LQFP32 (STC Micro) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stc8c2k48s4-36i-lqfp32.kicad_sym",
    "stc8c2k48s4-36i-lqfp32.kicad_mod",
    "stc8c2k48s4-36i-lqfp32.glb",
    "stc8c2k48s4-36i-lqfp32.step",
    "stc8c2k48s4-36i-lqfp32.lbr",
    "docs/hero.png",
    "docs/stc8c2k48s4-36i-lqfp32-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stc8c2k48s4-36i-lqfp32-hero.glb",
    "stc8c2k48s4-36i-lqfp32-hero.overlay.json",
    "stc8c2k48s4-36i-lqfp32-etched.glb"
  ],
  "visibility": {
    "public": true
  }
}