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STC8C2K48S4-36I-LQFP32
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STC Micro Microcontroller Units (MCUs/MPUs/SOCs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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STC8C2K48S4-36I-LQFP32
STC Micro · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)
STC8C2K48S4-36I-LQFP32 from STC Micro, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0/RxD2 | bidirectional | Standard I/O port pin P1.0 that also serves as the UART2 receive input RxD2; it is in high-impedance input state after power-on. |
| 2 | P1.1/TxD2 | bidirectional | Standard I/O port pin P1.1 that also serves as the UART2 transmit output TxD2; it is in high-impedance input state after power-on. |
| 3 | P1.2/SS/T2 | bidirectional | Standard I/O port pin P1.2 that also serves as the SPI slave-select SS (output when master) and the external clock input of Timer 2. |
| 4 | P1.3/MOSI/T2CLKO | bidirectional | Standard I/O port pin P1.3 that also serves as SPI MOSI (master out, slave in) and the Timer 2 divided clock output T2CLKO. |
| 5 | P1.4/MISO/SDA | bidirectional | Standard I/O port pin P1.4 that also serves as SPI MISO (master in, slave out) and the I2C data line SDA. |
| 6 | P1.5/SCLK/SCL | bidirectional | Standard I/O port pin P1.5 that also serves as the SPI clock SCLK and the I2C clock line SCL. |
| 7 | P1.6/RxD_3/XTALO/MCLKO_2 | bidirectional | Standard I/O port pin P1.6 that also serves as the UART1 receive input RxD_3, the external crystal output XTALO and the divided main clock output MCLKO_2. |
| 8 | P1.7/TxD_3/XTALI | bidirectional | Standard I/O port pin P1.7 that also serves as the UART1 transmit output TxD_3 and the external crystal or external clock input XTALI. |
| 9 | P5.4/RST/MCLKO | bidirectional | Standard I/O port pin P5.4 that can be configured in ISP as the active-low reset input RST, and also outputs the divided main clock MCLKO; its internal 4K pull-up is on continuously when used as reset. |
| 10 | Vcc | power_in | Positive supply pin; the device operates from 1.9V to 5.5V, with a 10uF-or-larger plus 0.1uF decoupling capacitor recommended close to Vcc and Gnd. |
| 11 | P5.5 | bidirectional | Standard I/O port pin P5.5, in high-impedance input state after power-on until its mode is configured. |
| 12 | Gnd | power_in | Ground pin. |
| 13 | P3.0/RxD/INT4 | bidirectional | Standard I/O port pin P3.0 that also serves as the UART1 receive input RxD and external interrupt 4 (falling edge only); it is in weak pull-up quasi-bidirectional mode after power-on and is used for ISP download. |
| 14 | P3.1/TxD | bidirectional | Standard I/O port pin P3.1 that also serves as the UART1 transmit output TxD; it is in weak pull-up quasi-bidirectional mode after power-on and is used for ISP download. |
| 15 | P3.2/INT0/SCLK_4/SCL_4 | bidirectional | Standard I/O port pin P3.2 that also serves as external interrupt 0 (rising and falling edge) and the alternate SPI clock SCLK_4 and I2C clock SCL_4; P3.0, P3.1 and P3.2 must not all be low at power-up unless USB download is intended. |
| 16 | P3.3/INT1/MISO_4/SDA_4 | bidirectional | Standard I/O port pin P3.3 that also serves as external interrupt 1 (rising and falling edge) and the alternate SPI MISO_4 and I2C data line SDA_4. |
| 17 | P3.4/T0/T1CLKO/MOSI_4/CMPO | bidirectional | Standard I/O port pin P3.4 that also serves as the Timer 0 external clock input T0, the Timer 1 divided clock output T1CLKO, the alternate SPI MOSI_4 and the comparator output CMPO. |
| 18 | P3.5/T1/T0CLKO/SS_4 | bidirectional | Standard I/O port pin P3.5 that also serves as the Timer 1 external clock input T1, the Timer 0 divided clock output T0CLKO and the alternate SPI slave-select SS_4. |
| 19 | P3.6/INT2/WR_2/RxD_2/CMP- | bidirectional | Standard I/O port pin P3.6 that also serves as external interrupt 2 (falling edge only), the external bus write strobe WR_2, the UART1 receive input RxD_2 and the comparator negative input CMP-. |
| 20 | P3.7/INT3/RD_2/TxD_2/CMP+ | bidirectional | Standard I/O port pin P3.7 that also serves as external interrupt 3 (falling edge only), the external bus read strobe RD_2, the UART1 transmit output TxD_2 and the comparator positive input CMP+. |
| 21 | P2.0 | bidirectional | Standard I/O port pin P2.0, in high-impedance input state after power-on until its mode is configured. |
| 22 | P2.1 | bidirectional | Standard I/O port pin P2.1, in high-impedance input state after power-on until its mode is configured. |
| 23 | P2.2/SS_2 | bidirectional | Standard I/O port pin P2.2 that also serves as the alternate SPI slave-select SS_2. |
| 24 | P2.3/MOSI_2 | bidirectional | Standard I/O port pin P2.3 that also serves as the alternate SPI MOSI_2. |
| 25 | P2.4/MISO_2/I2CSDA_2 | bidirectional | Standard I/O port pin P2.4 that also serves as the alternate SPI MISO_2 and I2C data line SDA_2. |
| 26 | P2.5/SCLK_2/I2CSCL_2 | bidirectional | Standard I/O port pin P2.5 that also serves as the alternate SPI clock SCLK_2 and I2C clock line SCL_2. |
| 27 | P2.6 | bidirectional | Standard I/O port pin P2.6, in high-impedance input state after power-on until its mode is configured. |
| 28 | P2.7 | bidirectional | Standard I/O port pin P2.7, in high-impedance input state after power-on until its mode is configured. |
| 29 | P0.0/RxD3 | bidirectional | Standard I/O port pin P0.0 that also serves as the UART3 receive input RxD3 and bus line AD0. |
| 30 | P0.1/TxD3 | bidirectional | Standard I/O port pin P0.1 that also serves as the UART3 transmit output TxD3 and bus line AD1. |
| 31 | P0.2/RxD4 | bidirectional | Standard I/O port pin P0.2 that also serves as the UART4 receive input RxD4 and bus line AD2. |
| 32 | P0.3/TxD4 | bidirectional | Standard I/O port pin P0.3 that also serves as the UART4 transmit output TxD4 and bus line AD3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | LQFP-32(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 32 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 419 |
CAD (KiCad official)
- Symbol:
STC8C2K48S4-36I-LQFP32 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stc8c2k48s4-36i-lqfp32-etched.step/stc8c2k48s4-36i-lqfp32-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc8c2k48s4-36i-lqfp32.step/stc8c2k48s4-36i-lqfp32.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (956 pp, sha256
f8fa5bab02998432, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).