component
STB8NM60T4
Public Made by Adomby adom
STMicroelectronics MOSFETs, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTB8NM60T4
STMicroelectronics · MOSFETs · D2PAK
STB8NM60T4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the N-channel MOSFET; gate-source voltage is limited to ±30 V (absolute maximum). |
| 2 | D | passive | Drain terminal, also connected to the TAB; rated for 600 V drain-source breakdown (V(BR)DSS) and 8 A continuous drain current at TC = 25 °C. |
| 3 | S | passive | Source terminal; source-drain diode is rated for 8 A continuous and 32 A pulsed source-drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | D2PAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -30 | 30 | V | 2 | ||
| Drain current (continuous) | ID | 8 | A | TC = 25 °C | 2 | ||
| Drain current (continuous) | ID | 5 | A | TC = 100 °C | 2 | ||
| Drain current (pulsed) | IDM | 32 | A | Pulse width limited by safe operating area | 2 | ||
| Total power dissipation | PTOT | 100 | W | TC = 25 °C | 2 | ||
| Peak diode recovery voltage slope | dv/dt | 15 | V/ns | ISD ≤ 8 A, di/dt ≤ 400 A/μs, VDD = 80% V(BR)DSS | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | °C | 2 | ||
| Avalanche current, repetitive or non-repetitive | IAS | 2.5 | A | Pulse width limited by TJ max. | 2 | ||
| Single pulse avalanche energy | EAS | 200 | mJ | Starting TJ = 25 °C, ID = IAS, VDD = 50 V | 2 | ||
| Thermal resistance, junction-to-case | RthJC | 1.25 | °C/W | 2 | |||
| Thermal resistance, junction-to-ambient | RthJA | 35 | °C/W | When mounted on 1 inch2 FR-4, 2 Oz copper board | 2 | ||
| Drain-source breakdown voltage | V(BR)DSS | 600 | V | ID = 250 μA, VGS = 0 V | 3 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VGS = 0 V, VDS = 600 V | 3 | ||
| Zero gate voltage drain current | IDSS | 10 | µA | VGS = 0 V, VDS = 600 V, TC = 125 °C (specified by design, not tested in production) | 3 | ||
| Gate body leakage current | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 3 | |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) | 0.9 | 1 | Ω | VGS = 10 V, ID = 2.5 A | 3 | |
| Source-drain current | ISD | 8 | A | 4 | |||
| Source-drain current (pulsed) | ISDM | 32 | A | 4 | |||
| Forward on voltage | VSD | 1.5 | V | ISD = 5 A, VGS = 0 V | 4 |
CAD (KiCad official)
- Symbol:
STB8NM60T4 - Footprint:
Package_TO_SOT_SMD:TO-263-2 - 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files:
stb8nm60t4-etched.step/stb8nm60t4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stb8nm60t4.step/stb8nm60t4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (13 pp, sha256
315833c24bba8539, retrieved 2026-10-09, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).