# STB46N30M5

**STMicroelectronics** · MOSFETs · D2PAK

STB46N30M5 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the N-channel MOSFET; gate-source voltage is rated at ±25 V (Table 1). |
| 2 | D | passive | Drain terminal, also connected to the TAB; continuous drain current is 53 A at TC = 25 °C (Table 1). |
| 3 | S | passive | Source terminal; the source-drain diode forward voltage is at most 1.5 V at ISD = 53 A, VGS = 0 V (Table 7). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | D2PAK |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -25 |  | 25 | V |  | 2 |
| Drain current (continuous) at TC = 25 °C | ID |  |  | 53 | A | TC = 25 °C | 2 |
| Drain current (continuous) at TC = 100 °C | ID |  |  | 34 | A | TC = 100 °C | 2 |
| Drain current (pulsed) | IDM |  |  | 212 | A | Pulse width limited by safe operating area | 2 |
| Total power dissipation at TC = 25 °C | PTOT |  |  | 250 | W | TC = 25 °C | 2 |
| Peak diode recovery voltage slope | dv/dt |  |  | 15 | V/ns | ISD ≤ 53 A, di/dt ≤ 400 A/μs; VDS (peak) < V(BR)DSS, VDD = 240 V | 2 |
| Storage temperature range | Tstg | -55 |  | 150 | °C |  | 2 |
| Maximum operating junction temperature | TJ |  |  | 150 | °C |  | 2 |
| Avalanche current, repetitive or not-repetitive | IAR |  |  | 16 | A | Pulse width limited by TJ max. | 2 |
| Single pulse avalanche energy | EAS |  |  | 550 | mJ | Starting Tj = 25 °C, ID = IAR, VDD = 50 V | 2 |
| Thermal resistance, junction-to-case | RthJC |  |  | 0.5 | °C/W | Junction-to-case | 2 |
| Thermal resistance, junction-to-ambient | RthJA |  |  | 30 | °C/W | When mounted on a standard 1 inch² area of FR-4 PCB with 2-oz copper | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 300 |  |  | V | ID = 1 mA, VGS = 0 V | 3 |
| Zero gate voltage drain current | IDSS |  |  | 1 | µA | VGS = 0 V, VDS = 300 V | 3 |
| Zero gate voltage drain current (TC = 125 °C) | IDSS |  |  | 100 | µA | VGS = 0 V, VDS = 300 V, TC = 125 °C | 3 |
| Gate body leakage current | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ±25 V | 3 |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) |  | 37 | 40 | mΩ | VGS = 10 V, ID = 26.5 A | 3 |
| Source-drain current | ISD |  |  | 53 | A |  | 4 |
| Source-drain current (pulsed) | ISDM |  |  | 212 | A |  | 4 |
| Forward on voltage | VSD |  |  | 1.5 | V | ISD = 53 A, VGS = 0 V | 4 |
| Input capacitance | Ciss |  | 4240 |  | pF | VDS = 100 V, f = 1 MHz, VGS = 0 V | 3 |
| Output capacitance | Coss |  | 205 |  | pF | VDS = 100 V, f = 1 MHz, VGS = 0 V | 3 |
| Reverse transfer capacitance | Crss |  | 9.5 |  | pF | VDS = 100 V, f = 1 MHz, VGS = 0 V | 3 |
| Equivalent output capacitance, time related | Co(tr) |  | 373 |  | pF | VDS = 0 to 240 V, VGS = 0 V | 3 |
| Equivalent output capacitance, energy related | Co(er) |  | 202 |  | pF |  | 3 |
| Gate input resistance | Rg |  | 1.4 |  | Ω | f = 1 MHz open drain | 3 |
| Total gate charge | Qg |  | 95 |  | nC | VDD = 240 V, ID = 24 A, VGS = 0 to 10 V | 3 |
| Gate-source charge | Qgs |  | 23 |  | nC | VDD = 240 V, ID = 24 A, VGS = 0 to 10 V | 3 |
| Gate-drain charge | Qgd |  | 37 |  | nC | VDD = 240 V, ID = 24 A, VGS = 0 to 10 V | 3 |
| Voltage delay time | td(v) |  | 66 |  | ns | VDD = 240 V, ID = 32 A, RG = 4.7 Ω, VGS = 10 V | 3 |
| Voltage rise time | tr(v) |  | 15 |  | ns | VDD = 240 V, ID = 32 A, RG = 4.7 Ω, VGS = 10 V | 3 |
| Crossing time off | tc(off) |  | 22.5 |  | ns | VDD = 240 V, ID = 32 A, RG = 4.7 Ω, VGS = 10 V | 3 |
| Current fall time | tf(i) |  | 24 |  | ns | VDD = 240 V, ID = 32 A, RG = 4.7 Ω, VGS = 10 V | 3 |
| Reverse recovery time | trr |  | 223 |  | ns | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V | 4 |
| Reverse recovery charge | Qrr |  | 2.5 |  | μC | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V | 4 |
| Reverse recovery current | IRRM |  | 23 |  | A | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V | 4 |
| Reverse recovery time (TJ = 150 °C) | trr |  | 280 |  | ns | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C | 4 |
| Reverse recovery charge (TJ = 150 °C) | Qrr |  | 3.9 |  | μC | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C | 4 |
| Reverse recovery current (TJ = 150 °C) | IRRM |  | 28 |  | A | ISD = 48 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C | 4 |

## CAD (KiCad official)

- Symbol: `STB46N30M5`
- Footprint: `Package_TO_SOT_SMD:TO-263-2`
- 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files: `stb46n30m5-etched.step` / `stb46n30m5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stb46n30m5.step` / `stb46n30m5.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stb46n30m5.pdf) (15 pp, sha256 `18b316f0095821fc`, retrieved 2026-10-12, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stb46n30m5-datasheet.pdf)