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SST26VF032B-104I

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Microchip Tech NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SST26VF032B-104I

Microchip Tech · NOR FLASH · SOIC-8-208mil

SST26VF032B-104I from Microchip Tech, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: the device is enabled by a high-to-low transition on CE#, and CE# must remain low for the duration of any command sequence or write command/data input sequence.
2 SO/SIO1 bidirectional Serial Data Output for SPI mode (default after power-on) shifts data out on the falling edge of SCK; it is SIO1 of the 4-bit I/O bus when the Enable Quad I/O (EQIO) command is used.
3 WP#/SIO2 bidirectional Write-Protect is used with the WPEN and IOC bits in the Configuration register to prohibit writes to the Block Protection register and works only in SPI single-bit and dual-bit read mode; it is SIO2 in Quad I/O mode.
4 VSS power_in Ground.
5 SI/SIO0 bidirectional Serial Data Input for SPI mode (default after power-on) latches inputs on the rising edge of SCK; it is SIO0 of the 4-bit I/O bus when Quad I/O mode is enabled.
6 SCK input Serial Clock provides the timing of the serial interface; commands, addresses, and input data are latched on the rising edge and output data is shifted out on the falling edge.
7 HOLD#/SIO3 bidirectional Hold temporarily stops serial communication while the device is selected and works only in SPI single-bit and dual-bit read mode; it must be tied high when not in use, and it is SIO3 in Quad I/O mode.
8 VDD power_in Power Supply: provides the device supply voltage (2.7V-3.6V or 2.3V-3.6V per the features list).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Industrial ambient temperature range -40 85 °C Industrial grade 42
VDD supply voltage VDD 2.3 3.6 V Operating range (merged VDD cell for all grades) 42
Temperature under bias -55 125 °C 42
Storage temperature -65 150 °C 42
DC voltage on any pin to ground potential -0.5 V Printed max is VDD+0.5V 42
Transient voltage on any pin to ground potential -2 V <20 ns; printed max is VDD+2.0V 42
Package power dissipation capability 1 W TA = 25°C 42
VDD minimum to read operation TPU-READ 100 µs 42
VDD minimum to write operation TPU-WRITE 100 µs 42
Power-down duration TPD 100 ms 42
VDD off time VOFF 0.3 V 0V recommended 42
Read current IDDR1 8 15 mA VDD=VDD Max, CE# = 0.1 VDD/0.9 VDD @40 MHz, SO = open 44
Read current IDDR2 20 mA VDD = VDD Max, CE# = 0.1 VDD/0.9 VDD @104 MHz, SO = open 44
Program and erase current IDDW1 25 mA CE# = VDD Max 44
Standby current ISB1 15 45 µA CE# = VDD, VIN = VDD or VSS 44
Input leakage current ILI 2 µA VIN = GND to VDD, VDD = VDD Max 44
Output leakage current ILO 2 µA VOUT = GND to VDD, VDD = VDD Max 44
Input low voltage VIL 0.8 V VDD = VDD Min 44
Output low voltage VOL 0.2 V IOL = 100 µA, VDD = VDD Min 44
Output pin capacitance COUT 8 pF TA = 25°C, F = 1 MHz, other pins open; VOUT = 0V 44
Input capacitance CIN 6 pF TA = 25°C, F = 1 MHz, other pins open; VIN = 0V 44
Endurance NEND 100000 Cycles JEDEC Standard A117 and AEC-Q100-005 44
Data retention TDR 100 Years JEDEC Standard A103 and AEC-Q100-005 44
Sector erase time TSE 25 ms VDD = 2.3V-3.6V 45
Block erase time TBE 25 ms VDD = 2.3V-3.6V 45
Chip erase time TSCE 50 ms VDD = 2.3V-3.6V 45
Page program time TPP 1.5 ms VDD = 2.3V-3.6V 45
Program security-ID time TPSID 1.5 ms VDD = 2.3V-3.6V 45
Write suspend latency TWS 25 µs VDD = 2.3V-3.6V 45
Write protection enable bit latency TWPEN 25 ms VDD = 2.3V-3.6V 45
Serial clock frequency FCLK 104 MHz VDD = 2.3V-3.6V, 104 MHz limits 46
Serial clock period TCLK 9.6 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Serial clock high time TSCKH 4.5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Serial clock low time TSCKL 4.5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Serial clock rise time (slew rate) TSCKR 0.1 V/ns VDD = 2.3V-3.6V, 104 MHz limits 46
Serial clock fall time (slew rate) TSCKF 0.1 V/ns VDD = 2.3V-3.6V, 104 MHz limits 46
CE# active setup time TCES 5 ns VDD = 2.3V-3.6V, 104 MHz limits; relative to SCK 46
CE# active hold time TCEH 5 ns VDD = 2.3V-3.6V, 104 MHz limits; relative to SCK 46
CE# not active setup time TCHS 5 ns VDD = 2.3V-3.6V, 104 MHz limits; relative to SCK 46
CE# not active hold time TCHH 5 ns VDD = 2.3V-3.6V, 104 MHz limits; relative to SCK 46
CE# high time TCPH 12 ns VDD = 2.3V-3.6V, 104 MHz limits 46
CE# high to high-Z output TCHZ 12 ns VDD = 2.3V-3.6V, 104 MHz limits 46
SCK low to low-Z output TCLZ 0 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# low setup time THLS 5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# high setup time THHS 5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# low hold time THLH 5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# high hold time THHH 5 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# low-to-high-Z output THZ 8 ns VDD = 2.3V-3.6V, 104 MHz limits 46
HOLD# high-to-low-Z output TLZ 8 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Data in setup time TDS 3 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Data in hold time TDH 4 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Output hold from SCK change TOH 0 ns VDD = 2.3V-3.6V, 104 MHz limits 46
Reset to read (non-data operation) TR(o) 20 ns 47
Reset recovery from program or suspend TR(p) 100 µs 47
Reset recovery from erase TR(e) 1 ms 47

CAD (KiCad official)

  • Symbol: SST26VF032B-104I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: sst26vf032b-104i-etched.step / sst26vf032b-104i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sst26vf032b-104i.step / sst26vf032b-104i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (81 pp, sha256 2566847338399047, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF