# SSM6N7002KFU

**TOSHIBA** · MOSFETs · SOT-363

SSM6N7002KFU from TOSHIBA, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Source1 | passive | Source terminal of MOSFET 1; the device-level absolute maximum drain-source voltage is 60 V and DC drain current is 300 mA. |
| 2 | Gate1 | input | Gate terminal of MOSFET 1; the device-level absolute maximum gate-source voltage is ±20 V. |
| 3 | Drain2 | passive | Drain terminal of MOSFET 2; the device-level absolute maximum drain-source voltage is 60 V. |
| 4 | Source2 | passive | Source terminal of MOSFET 2; the device-level absolute maximum drain-source voltage is 60 V and DC drain current is 300 mA. |
| 5 | Gate2 | input | Gate terminal of MOSFET 2; the device-level absolute maximum gate-source voltage is ±20 V. |
| 6 | Drain1 | passive | Drain terminal of MOSFET 1; the device-level absolute maximum drain-source voltage is 60 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOT-363 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDSS |  |  | 60 | V |  | 2 |
| Gate-source voltage | VGSS | -20 |  | 20 | V |  | 2 |
| Drain current (DC) | ID |  |  | 300 | mA | Note 1, Note 2 | 2 |
| Drain current (pulsed) | IDP |  |  | 1200 | mA | Note 1, Note 3 (pulse width ≤ 10 µs, Duty 1 %) | 2 |
| Power dissipation | PD |  |  | 500 | mW | Note 2, Note 4 (Tsp = 25 °C; total rating) | 2 |
| Power dissipation (mounted on board) | PD |  |  | 285 | mW | Note 4, Note 5 (25.4 × 25.4 × 1.6 mm FR-4, Cu pad 645 mm²) | 2 |
| Channel temperature | Tch |  |  | 150 | °C |  | 2 |
| Storage temperature | Tstg | -55 |  | 150 | °C |  | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 60 |  |  | V | ID = 250 µA, VGS = 0 V | 3 |
| Gate threshold voltage | Vth | 1.1 |  | 2.1 | V | ID = 250 µA, VDS = VGS | 3 |
| Drain-source on-resistance | RDS(ON) |  | 1.05 | 1.5 | Ω | ID = 100 mA, VGS = 10 V | 3 |
| Drain-source on-resistance | RDS(ON) |  | 1.15 | 1.65 | Ω | ID = 100 mA, VGS = 5.0 V | 3 |
| Drain-source on-resistance | RDS(ON) |  | 1.2 | 1.75 | Ω | ID = 100 mA, VGS = 4.5 V | 3 |
| Input capacitance | Ciss |  | 26 | 40 | pF | VDS = 10 V, VGS = 0 V, f = 1 MHz | 3 |
| Total gate charge (gate-source plus gate-drain) | Qg |  | 0.39 | 0.6 | nC | VDD = 30 V, VGS = 4.5 V, ID = 200 mA | 3 |
| Diode forward voltage | VDSF |  | -0.79 | -1.1 | V | ID = -115 mA, VGS = 0 V | 4 |

## CAD (KiCad official)

- Symbol: `SSM6N7002KFU`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `ssm6n7002kfu-etched.step` / `ssm6n7002kfu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ssm6n7002kfu.step` / `ssm6n7002kfu.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TOSHIBA datasheet](docs/ssm6n7002kfu-datasheet.pdf) (8 pp, sha256 `8706b0b83257526b`, retrieved 2026-10-21, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ssm6n7002kfu-datasheet.pdf)