SS4129

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  "schema_version": 1,
  "type": "component",
  "slug": "ss4129",
  "title": "SS4129",
  "brief": "orisilicon Leakage Protection ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "ss4129"
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  "component": {
    "mpn": "SS4129",
    "manufacturer": "orisilicon",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Leakage Protection ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603187171142610944",
    "parts": {
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      "footprint": "ss4129.kicad_mod",
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      "model_3d_plain": "ss4129.glb",
      "model_3d_step": "ss4129-etched.step",
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      "lbr": "ss4129.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "IN1",
        "type": "input",
        "description": "Non-inverting input of the internal differential amplifier (op-amp). Connects to one end of the external zero-current transformer (ZCT) secondary via the input sensing network."
      },
      {
        "number": "2",
        "name": "IN2",
        "type": "input",
        "description": "Inverting input of the internal differential amplifier (op-amp). Connects to the other end of the external ZCT secondary. The differential input |IN1-IN2| is compared against the trip threshold VT (typ 4.95 mV)."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference (chip substrate ground)."
      },
      {
        "number": "4",
        "name": "OA",
        "type": "output",
        "description": "Filter and integrator output of the internal op-amp / precision rectifier stage. External RC network at this pin sets the integration time constant for RMS leakage detection."
      },
      {
        "number": "5",
        "name": "VTRIG",
        "type": "input",
        "description": "Overvoltage comparator input. When the voltage at this pin exceeds VOVT (typ 1.5 V, range 1.3-1.7 V), the overvoltage protection triggers SCR drive to disconnect the mains."
      },
      {
        "number": "6",
        "name": "OSHI",
        "type": "output",
        "description": "High drive-current SCR gate output pin. Sources typ 480 uA (min 400 uA, max 600 uA at 25 C) with OSH = 0.8 V to drive the external SCR gate when a leakage trip is detected. Outputs up to 4 pulses at 30ms:100ms duty cycle when the circuit breaker fails to trip."
      },
      {
        "number": "7",
        "name": "OSLI",
        "type": "output",
        "description": "Low drive-current SCR gate output pin. Sources typ 480 uA (min 400 uA, max 600 uA at 25 C) with OSL = 0.8 V, driving a second SCR for redundant/small-current path. Outputs up to 4 pulses at 30ms:100ms duty cycle when the circuit breaker fails to trip."
      },
      {
        "number": "8",
        "name": "VS",
        "type": "power_in",
        "description": "Supply pin, internally clamped by a zener/regulator (VS typ 5 V, range 4.7-5.3 V, absolute max 7.2 V). Powered from the AC mains via a dropping resistor and rectifier; typical quiescent current is 190 uA."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603187171142610944",
        "pages": 14,
        "sha256": "e810e49bd86984ce",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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        "role": "plain",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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      {
        "file": "ss4129-etched.step",
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        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "orisilicon",
      "Package": "SOP-8",
      "Category": "Power Management (PMIC)",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "SS4129",
      "kind": "packaging"
    }
  ],
  "sections": [
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  "discovery_triggers": [
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  "discovery_pitch": "SS4129 (orisilicon) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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  "visibility": {
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  "updated_at": "2026-09-25T08:06:37.706Z"
}