Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SS4129

orisilicon · Leakage Protection ICs · SOP-8

SS4129 from orisilicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Non-inverting input of the internal differential amplifier (op-amp). Connects to one end of the external zero-current transformer (ZCT) secondary via the input sensing network.
2 IN2 input Inverting input of the internal differential amplifier (op-amp). Connects to the other end of the external ZCT secondary. The differential input
3 GND power_in Device ground reference (chip substrate ground).
4 OA output Filter and integrator output of the internal op-amp / precision rectifier stage. External RC network at this pin sets the integration time constant for RMS leakage detection.
5 VTRIG input Overvoltage comparator input. When the voltage at this pin exceeds VOVT (typ 1.5 V, range 1.3-1.7 V), the overvoltage protection triggers SCR drive to disconnect the mains.
6 OSHI output High drive-current SCR gate output pin. Sources typ 480 uA (min 400 uA, max 600 uA at 25 C) with OSH = 0.8 V to drive the external SCR gate when a leakage trip is detected. Outputs up to 4 pulses at 30ms:100ms duty cycle when the circuit breaker fails to trip.
7 OSLI output Low drive-current SCR gate output pin. Sources typ 480 uA (min 400 uA, max 600 uA at 25 C) with OSL = 0.8 V, driving a second SCR for redundant/small-current path. Outputs up to 4 pulses at 30ms:100ms duty cycle when the circuit breaker fails to trip.
8 VS power_in Supply pin, internally clamped by a zener/regulator (VS typ 5 V, range 4.7-5.3 V, absolute max 7.2 V). Powered from the AC mains via a dropping resistor and rectifier; typical quiescent current is 190 uA.

Key specifications

Parameter Value
Manufacturer orisilicon
Package SOP-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SS4129

CAD (KiCad official)

  • Symbol: SS4129
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ss4129-etched.step / ss4129-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ss4129.step / ss4129.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: orisilicon datasheet (14 pp, sha256 e810e49bd86984ce, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF