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SQ4410EY-T1_GE3

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Vishay Intertech MOSFETs, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Ray sq4410ey-t1-ge3: specified limits as data (metadata.characteristics, 38 rows from the datasheet) 7e15341 23d ago

SQ4410EY-T1_GE3

Vishay Intertech · MOSFETs · SOIC-8

SQ4410EY-T1_GE3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-Channel MOSFET. Tied internally to pins 2 and 3 (all three source pins are ganged).
2 S passive Source terminal of the N-Channel MOSFET. Tied internally to pins 1 and 3.
3 S passive Source terminal of the N-Channel MOSFET. Tied internally to pins 1 and 2.
4 G input Gate terminal of the N-Channel MOSFET. VGS(th) = 1.5-2.5 V; absolute maximum VGS = ±20 V. Gate resistance ~0.5-2 Ω at 1 MHz; total gate charge Qg ~35 nC at VGS = 10 V.
5 D passive Drain terminal of the N-Channel MOSFET. Tied internally to pins 6, 7, and 8 (all four drain pins are ganged for improved current and thermal handling).
6 D passive Drain terminal of the N-Channel MOSFET. Tied internally to pins 5, 7, and 8.
7 D passive Drain terminal of the N-Channel MOSFET. Tied internally to pins 5, 6, and 8. VDS max = 30 V.
8 D passive Drain terminal of the N-Channel MOSFET. Tied internally to pins 5, 6, and 7. Primary thermal path (junction-to-foot RthJF = 30 °C/W).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOIC-8
Category Transistors/Thyristors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SQ4410EY-T1_GE3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 30 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 15 A TC = 25 °C 1
Continuous drain current ID 9 A TC = 125 °C 1
Continuous source current (diode conduction) IS 4.5 A 1
Pulsed drain current IDM 60 A 1
Single pulse avalanche current IAS 38 A L = 0.1 mH 1
Single pulse avalanche energy EAS 72 mJ 1
Maximum power dissipation PD 5 W TC = 25 °C 1
Maximum power dissipation PD 1.6 W TC = 125 °C 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction-to-ambient PCB mount RthJA 90 °C/W PCB mount 1
Junction-to-foot (drain) RthJF 30 °C/W 1
Drain-source breakdown voltage VDS 30 V VGS = 0, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 1.5 2 2.5 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VGS = 0 V, VDS = 30 V 2
Zero gate voltage drain current IDSS 50 μA VGS = 0 V, VDS = 30 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS 150 μA VGS = 0 V, VDS = 30 V, TJ = 175 °C 2
On-state drain current ID(on) 20 A VGS = 10 V, VDS ≥ 5 V 2
Drain-source on-state resistance RDS(on) 0.009 0.012 Ω VGS = 10 V, ID = 10 A 2
Drain-source on-state resistance RDS(on) 0.018 Ω VGS = 10 V, ID = 6 A, TJ = 125 °C 2
Drain-source on-state resistance RDS(on) 0.021 Ω VGS = 10 V, ID = 6 A, TJ = 175 °C 2
Drain-source on-state resistance RDS(on) 0.015 0.02 Ω VGS = 4.5 V, ID = 5 A 2
Forward transconductance gfs 34 S VDS = 15 V, ID = 10 A 2
Input capacitance Ciss 1906 2385 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Output capacitance Coss 460 575 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Reverse transfer capacitance Crss 183 230 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Total gate charge Qg 35 53 nC VGS = 10 V, VDS = 15 V, ID = 10 A 2
Gate-source charge Qgs 4.9 nC 2
Gate-drain charge Qgd 5.4 nC 2
Gate resistance Rg 0.5 2 Ω f = 1 MHz 2
Turn-on delay time td(on) 11 17 ns VDD = 15 V, RL = 1.5 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Rise time tr 7 11 ns VDD = 15 V, RL = 1.5 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 29 44 ns VDD = 15 V, RL = 1.5 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Fall time tf 8 12 ns VDD = 15 V, RL = 1.5 Ω, ID 10 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed current ISM 60 A 2
Forward voltage VSD 0.72 1.2 V IF = 2.3 A, VGS = 0 2

CAD (KiCad official)

  • Symbol: SQ4410EY-T1_GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sq4410ey-t1-ge3-etched.step / sq4410ey-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq4410ey-t1-ge3.step / sq4410ey-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (None pp, sha256 941cd7cbfcee6f6f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF