component
SP3400T2
Public Made by Adomby adom
Siliup MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SP3400T2
Siliup · MOSFETs · SOT-23
SP3400T2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±12 V absolute maximum, with threshold of 0.6 to 1.3 V at VDS=VGS, ID=250µA. |
| 2 | S | passive | Source; source terminal of the N-channel MOSFET, with continuous drain current rating of 5.8 A. |
| 3 | D | passive | Drain; drain-source voltage rated 30 V maximum with 5.8 A continuous (23.2 A pulsed) drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -12 | 12 | V | 2 | ||
| Continuous Drain Current | ID | 5.8 | A | 2 | |||
| Pulse Drain Current | IDM | 23.2 | A | Tested | 2 | ||
| Power Dissipation | PD | 1.3 | W | 2 | |||
| Thermal Resistance Junction-to-Ambient | RθJA | 96 | °C/W | 2 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS=0V, ID=250µA | 2 | ||
| Drain-Source Leakage Current | IDSS | 1 | uA | VDS=24V, VGS=0V | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±12V, VDS=0V | 2 | |
| Gate Threshold Voltage | VGS(th) | 0.6 | 0.95 | 1.3 | V | VDS=VGS, ID=250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 25 | 35 | mΩ | VGS=10V, ID=5.8A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 30 | 40 | mΩ | VGS=4.5V, ID=5A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 40 | 50 | mΩ | VGS=2.5V, ID=4A | 2 | |
| Diode Forward Voltage | VSD | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 | ||
| Input Capacitance | Ciss | 765 | pF | VDS=15V, VGS=0V, f=1MHz | 2 | ||
| Output Capacitance | Coss | 68 | pF | 2 | |||
| Reverse Transfer Capacitance | Crss | 53 | pF | 2 | |||
| Total Gate Charge | Qg | 18 | nC | VDS=15V, VGS=10V, ID=3A | 2 | ||
| Gate-Source Charge | Qgs | 3 | nC | 2 | |||
| Gate-Drain Charge | Qgd | 2.2 | nC | 2 | |||
| Turn-On Delay Time | td(on) | 5 | nS | VDD=15V, VGS=10V, RG=3Ω, ID=3A | 2 | ||
| Turn-On Rise Time | tr | 11 | nS | 2 | |||
| Turn-Off Delay Time | td(off) | 25 | nS | 2 | |||
| Turn-Off Fall Time | tf | 3 | nS | 2 |
CAD (KiCad official)
- Symbol:
SP3400T2 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
sp3400t2-etched.step/sp3400t2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp3400t2.step/sp3400t2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
418e0be15f446886, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SP3400T2
**Siliup** · MOSFETs · SOT-23
SP3400T2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±12 V absolute maximum, with threshold of 0.6 to 1.3 V at VDS=VGS, ID=250µA. |
| 2 | S | passive | Source; source terminal of the N-channel MOSFET, with continuous drain current rating of 5.8 A. |
| 3 | D | passive | Drain; drain-source voltage rated 30 V maximum with 5.8 A continuous (23.2 A pulsed) drain current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | | | 30 | V | | 2 |
| Gate-Source Voltage | VGSS | -12 | | 12 | V | | 2 |
| Continuous Drain Current | ID | | | 5.8 | A | | 2 |
| Pulse Drain Current | IDM | | | 23.2 | A | Tested | 2 |
| Power Dissipation | PD | | | 1.3 | W | | 2 |
| Thermal Resistance Junction-to-Ambient | RθJA | | | 96 | °C/W | | 2 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 2 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | °C | | 2 |
| Drain-Source Breakdown Voltage | BVDSS | 30 | | | V | VGS=0V, ID=250µA | 2 |
| Drain-Source Leakage Current | IDSS | | | 1 | uA | VDS=24V, VGS=0V | 2 |
| Gate-Source Leakage Current | IGSS | -100 | | 100 | nA | VGS=±12V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | 0.6 | 0.95 | 1.3 | V | VDS=VGS, ID=250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 25 | 35 | mΩ | VGS=10V, ID=5.8A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 30 | 40 | mΩ | VGS=4.5V, ID=5A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 40 | 50 | mΩ | VGS=2.5V, ID=4A | 2 |
| Diode Forward Voltage | VSD | | | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
| Input Capacitance | Ciss | | 765 | | pF | VDS=15V, VGS=0V, f=1MHz | 2 |
| Output Capacitance | Coss | | 68 | | pF | | 2 |
| Reverse Transfer Capacitance | Crss | | 53 | | pF | | 2 |
| Total Gate Charge | Qg | | 18 | | nC | VDS=15V, VGS=10V, ID=3A | 2 |
| Gate-Source Charge | Qgs | | 3 | | nC | | 2 |
| Gate-Drain Charge | Qgd | | 2.2 | | nC | | 2 |
| Turn-On Delay Time | td(on) | | 5 | | nS | VDD=15V, VGS=10V, RG=3Ω, ID=3A | 2 |
| Turn-On Rise Time | tr | | 11 | | nS | | 2 |
| Turn-Off Delay Time | td(off) | | 25 | | nS | | 2 |
| Turn-Off Fall Time | tf | | 3 | | nS | | 2 |
## CAD (KiCad official)
- Symbol: `SP3400T2`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `sp3400t2-etched.step` / `sp3400t2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp3400t2.step` / `sp3400t2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Siliup datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604425085214343168) (5 pp, sha256 `418e0be15f446886`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sp3400t2-datasheet.pdf)