component
SN75LVPE5421RUAR
Public Made by Adomby adom
Texas Instruments Interface - PCIs / PCIEs, WQFN-42. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "sn75lvpe5421ruar",
"title": "SN75LVPE5421RUAR",
"brief": "Texas Instruments Interface - PCIs / PCIEs, WQFN-42. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"sn75lvpe5421ruar",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "SN75LVPE5421RUAR",
"manufacturer": "Texas Instruments",
"package": "WQFN-42",
"pin_count": 43,
"category": "Interface",
"subcategory": "Interface - PCIs / PCIEs",
"datasheet": "https://www.ti.com/cn/lit/gpn/sn75lvpe5421",
"parts": {
"symbol": "sn75lvpe5421ruar.kicad_sym",
"footprint": "sn75lvpe5421ruar.kicad_mod",
"model_3d": "sn75lvpe5421ruar-hero.glb",
"model_3d_plain": "sn75lvpe5421ruar.glb",
"model_3d_step": "sn75lvpe5421ruar-etched.step",
"model_3d_step_plain": "sn75lvpe5421ruar.step",
"lbr": "sn75lvpe5421ruar.lbr"
},
"distributor_links": {
"lcsc": "C5216124",
"digikey": "296-SN75LVPE5421RUARTR-ND",
"mouser": "595-SN75LVPE5421RUAR"
},
"distributor_check": {
"checked_at": "2026-10-08T04:24:09Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-SN75LVPE5421RUARTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-SN75LVPE5421RUAR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GAIN/SDA",
"type": "bidirectional",
"description": "In Pin Mode this 5-level pin sets the flat broadband (DC and AC) gain for all channels and is sampled at power-up only; in SMBus/I2C mode it is the 3.3V SMBus/I2C data line and needs an external pull-up such as 4.7 kΩ."
},
{
"number": "2",
"name": "RSVD1",
"type": "passive",
"description": "Reserved pin; for best signal integrity connect it to GND, with a 0 Ω resistor to GND as an alternate option."
},
{
"number": "3",
"name": "TX0P",
"type": "output",
"description": "Noninverting differential TX output for Channel 0."
},
{
"number": "4",
"name": "TX0N",
"type": "output",
"description": "Inverting differential TX output for Channel 0."
},
{
"number": "5",
"name": "VCC",
"type": "power_in",
"description": "Power supply, VCC = 3.3V ±10%; connect through a low-resistance path to the board VCC plane."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "7",
"name": "TX1P",
"type": "output",
"description": "Noninverting differential TX output for Channel 1."
},
{
"number": "8",
"name": "TX1N",
"type": "output",
"description": "Inverting differential TX output for Channel 1."
},
{
"number": "9",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "10",
"name": "TX2P",
"type": "output",
"description": "Noninverting differential TX output for Channel 2."
},
{
"number": "11",
"name": "TX2N",
"type": "output",
"description": "Inverting differential TX output for Channel 2."
},
{
"number": "12",
"name": "RSVD2",
"type": "passive",
"description": "Reserved pin; for best signal integrity connect it to GND, with a 0 Ω resistor to GND as an alternate option."
},
{
"number": "13",
"name": "VCC",
"type": "power_in",
"description": "Power supply, VCC = 3.3V ±10%; connect through a low-resistance path to the board VCC plane."
},
{
"number": "14",
"name": "TX3P",
"type": "output",
"description": "Noninverting differential TX output for Channel 3."
},
{
"number": "15",
"name": "TX3N",
"type": "output",
"description": "Inverting differential TX output for Channel 3."
},
{
"number": "16",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "17",
"name": "SEL",
"type": "input",
"description": "3.3V LVCMOS mux select (weak internal pull-down) choosing Port A (Low) or Port B (High); it must be exercised in system implementations and is also used in the PCIe RX_DET state machine."
},
{
"number": "18",
"name": "PD",
"type": "input",
"description": "3.3V LVCMOS 2-level power-down control: High powers down all channels and Low powers up normal operation; PD must be low for a valid pulse width of at least 200 µs to be detected."
},
{
"number": "19",
"name": "TEST",
"type": "output",
"description": "TI internal test pin; keep no connect."
},
{
"number": "20",
"name": "EQ1",
"type": "input",
"description": "5-level input that, together with EQ0, sets receiver linear equalization (CTLE, AC gain) for all channels in Pin Mode; sampled at device power-up only."
},
{
"number": "21",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "22",
"name": "RXB3N",
"type": "input",
"description": "Inverting differential RX input for Port B, Channel 3."
},
{
"number": "23",
"name": "RXB3P",
"type": "input",
"description": "Noninverting differential RX input for Port B, Channel 3."
},
{
"number": "24",
"name": "RXA3N",
"type": "input",
"description": "Inverting differential RX input for Port A, Channel 3."
},
{
"number": "25",
"name": "RXA3P",
"type": "input",
"description": "Noninverting differential RX input for Port A, Channel 3."
},
{
"number": "26",
"name": "RXB2N",
"type": "input",
"description": "Inverting differential RX input for Port B, Channel 2."
},
{
"number": "27",
"name": "RXB2P",
"type": "input",
"description": "Noninverting differential RX input for Port B, Channel 2."
},
{
"number": "28",
"name": "RXA2N",
"type": "input",
"description": "Inverting differential RX input for Port A, Channel 2."
},
{
"number": "29",
"name": "RXA2P",
"type": "input",
"description": "Noninverting differential RX input for Port A, Channel 2."
},
{
"number": "30",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "31",
"name": "RXB1N",
"type": "input",
"description": "Inverting differential RX input for Port B, Channel 1."
},
{
"number": "32",
"name": "RXB1P",
"type": "input",
"description": "Noninverting differential RX input for Port B, Channel 1."
},
{
"number": "33",
"name": "RXA1N",
"type": "input",
"description": "Inverting differential RX input for Port A, Channel 1."
},
{
"number": "34",
"name": "RXA1P",
"type": "input",
"description": "Noninverting differential RX input for Port A, Channel 1."
},
{
"number": "35",
"name": "RXB0N",
"type": "input",
"description": "Inverting differential RX input for Port B, Channel 0."
},
{
"number": "36",
"name": "RXB0P",
"type": "input",
"description": "Noninverting differential RX input for Port B, Channel 0."
},
{
"number": "37",
"name": "RXA0N",
"type": "input",
"description": "Inverting differential RX input for Port A, Channel 0."
},
{
"number": "38",
"name": "RXA0P",
"type": "input",
"description": "Noninverting differential RX input for Port A, Channel 0."
},
{
"number": "39",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "40",
"name": "EQ0/ADDR",
"type": "input",
"description": "5-level pin: in Pin Mode it sets receiver CTLE (AC gain) with EQ1 and is sampled at power-up only; in SMBus/I2C mode it sets the secondary address together with MODE."
},
{
"number": "41",
"name": "MODE",
"type": "input",
"description": "5-level pin that selects the control configuration: L0 is Pin Mode, L1 or L2 is SMBus/I2C mode, and L3/L4 (float) are reserved for TI internal test; sampled at power-up or in normal operation."
},
{
"number": "42",
"name": "RX_DET/SCL",
"type": "bidirectional",
"description": "5-level pin that sets receiver-detect state machine options in Pin Mode (sampled at power-up only) and is the 3.3V SMBus/I2C clock line needing an external pull-up such as 4.7 kΩ in SMBus/I2C mode."
},
{
"number": "43",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Datasheet types TEST as output (O) but says to keep it no connect; typed as output per the table, so; RSVD1 and RSVD2 are typed as '—' in the table; datasheet recommends tying them to GND, so typed pass; The exposed pad is printed as 'EP=GND' on the package drawing and is not a numbered lead; it is incl",
"exposed pad 43 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 9,
"cost_usd": 0.0816,
"at": "2026-10-08T04:23:53"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/sn75lvpe5421",
"pages": 34,
"sha256": "11ba0b44cce0af26",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 43,
"described": 43,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "sn75lvpe5421ruar.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5,
6,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "2569b48dcaceda4dbe78fcddd89f8dbed103372f8da3668c33ea3009042410c4",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn75lvpe5421ruar-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5,
6,
1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "a7f012853435d479edb7bc928ad22f7457582b6c717c7b69edc54ceeae3cefbb",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-42",
"Category": "Interface",
"Pins": "43"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sn75lvpe5421ruar"
],
"discovery_pitch": "SN75LVPE5421RUAR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"README.md",
"sn75lvpe5421ruar.kicad_sym",
"sn75lvpe5421ruar.kicad_mod",
"sn75lvpe5421ruar.glb",
"sn75lvpe5421ruar.step",
"sn75lvpe5421ruar.lbr",
"docs/hero.png",
"docs/sn75lvpe5421ruar-datasheet.pdf",
"viewers/symbol.html",
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"visibility": {
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}
}