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SN74LVC32AQPWRG4Q1

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVC32AQPWRG4Q1

Texas Instruments · Logic Gates · TSSOP-14

SN74LVC32AQPWRG4Q1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 data input A of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
2 1B input Channel 1 data input B of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
3 1Y output Channel 1 output Y; rated for IOH of -12 mA at VCC = 2.7 V and -24 mA at VCC = 3 V, and IOL of 12 mA at 2.7 V and 24 mA at 3 V.
4 2A input Channel 2 data input A of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
5 2B input Channel 2 data input B of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
6 2Y output Channel 2 output Y; rated for IOH of -12 mA at VCC = 2.7 V and -24 mA at VCC = 3 V, and IOL of 12 mA at 2.7 V and 24 mA at 3 V.
7 GND power_in Ground reference for the device.
8 3Y output Channel 3 output Y; rated for IOH of -12 mA at VCC = 2.7 V and -24 mA at VCC = 3 V, and IOL of 12 mA at 2.7 V and 24 mA at 3 V.
9 3A input Channel 3 data input A of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
10 3B input Channel 3 data input B of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
11 4Y output Channel 4 output Y; rated for IOH of -12 mA at VCC = 2.7 V and -24 mA at VCC = 3 V, and IOL of 12 mA at 2.7 V and 24 mA at 3 V.
12 4A input Channel 4 data input A of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
13 4B input Channel 4 data input B of the OR gate; inputs accept 0 V to 5.5 V and must not be left floating.
14 VCC power_in Positive supply; operating range 2 V to 3.6 V, with a 0.1 µF bypass capacitor recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LVC32AQPWRG4Q1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc32aqpwrg4q1-etched.step / sn74lvc32aqpwrg4q1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc32aqpwrg4q1.step / sn74lvc32aqpwrg4q1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 3eaa7b050b5bf4a6, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF