component
SN74LVC2G08DCUR
Public Made by Adomby adom
Texas Instruments Gates, VSSOP-8-0.5mm. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
sn74lvc2g08dcur: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
9fe9945
21h ago
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"datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc2g08dcur.pdf",
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"pins": [
{
"number": "1",
"name": "1A",
"type": "input",
"description": "Channel 1 logic input A. CMOS input, 5.5-V tolerant regardless of VCC. VIH = 0.7 x VCC and VIL = 0.3 x VCC at VCC = 4.5-5.5 V."
},
{
"number": "2",
"name": "1B",
"type": "input",
"description": "Channel 1 logic input B. CMOS input, 5.5-V tolerant. Unused inputs must be tied to VCC or GND."
},
{
"number": "3",
"name": "2Y",
"type": "output",
"description": "Channel 2 logic output (Y = 2A AND 2B). Push-pull CMOS output rated ±24 mA at VCC = 3 V, up to ±32 mA at VCC = 4.5 V."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V) for the device."
},
{
"number": "5",
"name": "2A",
"type": "input",
"description": "Channel 2 logic input A. CMOS input, 5.5-V tolerant. Unused inputs must be tied to VCC or GND."
},
{
"number": "6",
"name": "2B",
"type": "input",
"description": "Channel 2 logic input B. CMOS input, 5.5-V tolerant."
},
{
"number": "7",
"name": "1Y",
"type": "output",
"description": "Channel 1 logic output (Y = 1A AND 1B). Push-pull CMOS output rated ±24 mA at VCC = 3 V."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Positive supply pin. Operating range 1.65 V to 5.5 V; 1.5 V minimum for data retention. Bypass with a 0.1-µF ceramic to GND close to the pin."
}
],
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"extractor": "ds2sf",
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"url": "https://www.ti.com/lit/ds/symlink/sn74lvc2g08dcur.pdf",
"pages": 24,
"sha256": "886be44b41cfc0be",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
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"logic": {
"family_id": "74LVC2G08",
"logic_family": "74LVC",
"function_code": "2G08",
"function_class": "Gate",
"function_name": "2-gate variant of Quad 2-Input AND Gate (08)",
"manufacturer": "Texas Instruments",
"is_specialty": false
},
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"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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2.0,
0.85
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74lvc2g08dcur-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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2.0,
0.85
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "dc998cec9afeed9a0c19fe55c94dfbd313d3c873d3081badad200a54688b247c",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VSSOP-8-0.5mm",
"Category": "Logic",
"Pins": "8"
}
},
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"discovery_pitch": "SN74LVC2G08DCUR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
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"email": "[email protected]"
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"files": [
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"variants": [
{
"mpn": "SN74LVC2G08DCUR",
"kind": "packaging"
},
{
"mpn": "SN74LVC2G08DCURDCT",
"kind": "packaging"
},
{
"mpn": "SN74LVC2G08DCURDCTR",
"kind": "packaging"
},
{
"mpn": "SN74LVC2G08DCURYZP",
"kind": "packaging"
},
{
"mpn": "SN74LVC2G08DCURYZPR",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T07:43:29.282Z"
}