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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	sn74lvc2g08dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
viewers	sn74lvc2g08dcur: viewers · Ray	1mo ago
package.json	Publish 0.2.0 · Ray	1mo ago
page.json	sn74lvc2g08dcur: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	21h ago
README.md	sn74lvc2g08dcur: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	16d ago
sn74lvc2g08dcur-etched.fit.json	sn74lvc2g08dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
sn74lvc2g08dcur-etched.glb	sn74lvc2g08dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
sn74lvc2g08dcur-etched.step	sn74lvc2g08dcur: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
sn74lvc2g08dcur.glb	Publish 0.1.0 · Ray	1mo ago
sn74lvc2g08dcur.kicad_mod	Publish 0.1.0 · Ray	1mo ago
sn74lvc2g08dcur.kicad_sym	Publish 0.1.0 · Ray	1mo ago
sn74lvc2g08dcur.lbr	Publish 0.1.0 · Ray	1mo ago
sn74lvc2g08dcur.step	Publish 0.1.0 · Ray	1mo ago

SN74LVC2G08DCUR

Texas Instruments · Gates · VSSOP-8-0.5mm

SN74LVC2G08DCUR from Texas Instruments, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Channel 1 logic input A. CMOS input, 5.5-V tolerant regardless of VCC. VIH = 0.7 x VCC and VIL = 0.3 x VCC at VCC = 4.5-5.5 V.
2	1B	input	Channel 1 logic input B. CMOS input, 5.5-V tolerant. Unused inputs must be tied to VCC or GND.
3	2Y	output	Channel 2 logic output (Y = 2A AND 2B). Push-pull CMOS output rated ±24 mA at VCC = 3 V, up to ±32 mA at VCC = 4.5 V.
4	GND	power_in	Ground reference (0 V) for the device.
5	2A	input	Channel 2 logic input A. CMOS input, 5.5-V tolerant. Unused inputs must be tied to VCC or GND.
6	2B	input	Channel 2 logic input B. CMOS input, 5.5-V tolerant.
7	1Y	output	Channel 1 logic output (Y = 1A AND 1B). Push-pull CMOS output rated ±24 mA at VCC = 3 V.
8	VCC	power_in	Positive supply pin. Operating range 1.65 V to 5.5 V; 1.5 V minimum for data retention. Bypass with a 0.1-µF ceramic to GND close to the pin.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VSSOP-8-0.5mm
Category	Logic
Pins	8

Ordering variants

Same part, different packaging or reel option.

SN74LVC2G08DCUR
SN74LVC2G08DCURDCT
SN74LVC2G08DCURDCTR
SN74LVC2G08DCURYZP
SN74LVC2G08DCURYZPR

CAD (KiCad official)

Symbol: SN74LVC2G08DCUR
Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
3D model files: sn74lvc2g08dcur-etched.step / sn74lvc2g08dcur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc2g08dcur.step / sn74lvc2g08dcur.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sn74lvc2g08dcur.step`	122 KB	You want the bare part, or you mark your own boards.
`sn74lvc2g08dcur-etched.step`	3.0 MB	You want the part with `SN74LVC2G08DCUR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 717 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (24 pp, sha256 886be44b41cfc0be, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF