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SN74LVC08ADR

Public Made by Adom

by adom

Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lvc08adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn74lvc08adr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
README.md sn74lvc08adr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lvc08adr-etched.fit.json sn74lvc08adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc08adr-etched.glb sn74lvc08adr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
sn74lvc08adr-etched.step sn74lvc08adr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
sn74lvc08adr.glb Publish 0.1.0 · Ray
sn74lvc08adr.kicad_mod Publish 0.1.0 · Ray
sn74lvc08adr.kicad_sym Publish 0.1.0 · Ray
sn74lvc08adr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn74lvc08adr.step Publish 0.1.0 · Ray

SN74LVC08ADR

Texas Instruments · Gates · SOIC-14

SN74LVC08ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 input A. CMOS logic input; VIH >= 2 V (VCC = 2.7-3.6 V), VIL <= 0.8 V. Tolerates up to 5.5 V regardless of VCC.
2 1B input Channel 1 input B. CMOS logic input, 5.5 V tolerant.
3 1Y output Channel 1 output: 1Y = 1A AND 1B. Push-pull CMOS output; IOH/IOL = -24/24 mA at VCC = 3 V.
4 2A input Channel 2 input A. CMOS logic input, 5.5 V tolerant.
5 2B input Channel 2 input B. CMOS logic input, 5.5 V tolerant.
6 2Y output Channel 2 output: 2Y = 2A AND 2B. Push-pull CMOS output; IOH/IOL = -24/24 mA at VCC = 3 V.
7 GND power_in Ground reference (0 V) for all four gates.
8 3Y output Channel 3 output: 3Y = 3A AND 3B. Push-pull CMOS output; IOH/IOL = -24/24 mA at VCC = 3 V.
9 3A input Channel 3 input A. CMOS logic input, 5.5 V tolerant.
10 3B input Channel 3 input B. CMOS logic input, 5.5 V tolerant.
11 4Y output Channel 4 output: 4Y = 4A AND 4B. Push-pull CMOS output; IOH/IOL = -24/24 mA at VCC = 3 V.
12 4A input Channel 4 input A. CMOS logic input, 5.5 V tolerant.
13 4B input Channel 4 input B. CMOS logic input, 5.5 V tolerant.
14 VCC power_in Positive supply, 1.65 V to 3.6 V (SN74LVC08A). Absolute max 6.5 V. Bypass with a 0.1 uF ceramic near the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC08ADRD
  • SN74LVC08ADR
  • SN74LVC08ADRDB
  • SN74LVC08ADRDBR
  • SN74LVC08ADRPW
  • SN74LVC08ADRPWR
  • SN74LVC08ADRNS
  • SN74LVC08ADRNSR
  • SN74LVC08ADRJ
  • SN74LVC08ADRW
  • SN74LVC08ADRBQA
  • SN74LVC08ADRBQAR
  • SN74LVC08ADRRGY
  • SN74LVC08ADRRGYR
  • SN74LVC08ADRFK

CAD (KiCad official)

  • Symbol: SN74LVC08ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc08adr-etched.step / sn74lvc08adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc08adr.step / sn74lvc08adr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lvc08adr.step 195 KB You want the bare part, or you mark your own boards.
sn74lvc08adr-etched.step 2.6 MB You want the part with SN74LVC08ADR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 643 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 4f5059ae0bfb74dd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF