component
SN74LV4051ATPWREP
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, TSSOP-16-175mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "SN74LV4051ATPWREP",
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"manufacturer": "Texas Instruments",
"package": "TSSOP-16-175mil",
"pin_count": 16,
"category": "Interface",
"subcategory": "Analog Switches, Multiplexers",
"datasheet": "https://www.ti.com/cn/lit/gpn/sn74lv4051a-ep",
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"digikey": "296-22315-2-ND",
"mouser": "595-N74LV4051ATPWREP"
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{
"number": "1",
"name": "Y4",
"type": "passive",
"description": "Analog switch channel 4 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "2",
"name": "Y6",
"type": "passive",
"description": "Analog switch channel 6 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "3",
"name": "COM",
"type": "passive",
"description": "Common analog switch terminal that connects to the one channel Yn selected by A, B and C; I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "4",
"name": "Y7",
"type": "passive",
"description": "Analog switch channel 7 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "5",
"name": "Y5",
"type": "passive",
"description": "Analog switch channel 5 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "6",
"name": "INH",
"type": "input",
"description": "Active-high inhibit control: when high (VIH) all channels are off and no channel is selected; control input range is 0 to 5.5 V."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin; all unused inputs must be held at VCC or GND for proper operation."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin (second GND pin); all unused inputs must be held at VCC or GND for proper operation."
},
{
"number": "9",
"name": "C",
"type": "input",
"description": "Binary channel-select input (most significant bit of the channel address); control input range is 0 to 5.5 V."
},
{
"number": "10",
"name": "B",
"type": "input",
"description": "Binary channel-select input (middle bit of the channel address); control input range is 0 to 5.5 V."
},
{
"number": "11",
"name": "A",
"type": "input",
"description": "Binary channel-select input (least significant bit of the channel address); control input range is 0 to 5.5 V."
},
{
"number": "12",
"name": "Y3",
"type": "passive",
"description": "Analog switch channel 3 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "13",
"name": "Y0",
"type": "passive",
"description": "Analog switch channel 0 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "14",
"name": "Y1",
"type": "passive",
"description": "Analog switch channel 1 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "15",
"name": "Y2",
"type": "passive",
"description": "Analog switch channel 2 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max)."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Positive supply pin; recommended operation is 2 V to 5.5 V, and absolute maximum is 7.0 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The top-view pin-name listing on page 1 is extracted as two separate columns of text, so the pin num; The logic diagram on page 2 lists pin numbers (11,10,9,6,3,13,14,15,12,1,5,2,4) in an order that doe; The datasheet covers the SOIC (D/DW) and TSSOP (PW) variants with the same pin numbering. Only the P"
],
"pages_sent": 18,
"cost_usd": 0.0875,
"at": "2026-10-08T16:03:51"
},
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"url": "https://www.ti.com/cn/lit/gpn/sn74lv4051a-ep",
"pages": 18,
"sha256": "e0d1dea88834f97c",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
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"refuses_to_fabricate": true
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "TSSOP-16-175mil",
"Category": "Interface",
"Pins": "16"
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"email": "[email protected]"
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