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Contents

README

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SN74LV4051ATPWREP

Texas Instruments · Analog Switches, Multiplexers · TSSOP-16-175mil

SN74LV4051ATPWREP from Texas Instruments, in a TSSOP-16-175mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y4 passive Analog switch channel 4 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
2 Y6 passive Analog switch channel 6 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
3 COM passive Common analog switch terminal that connects to the one channel Yn selected by A, B and C; I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
4 Y7 passive Analog switch channel 7 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
5 Y5 passive Analog switch channel 5 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
6 INH input Active-high inhibit control: when high (VIH) all channels are off and no channel is selected; control input range is 0 to 5.5 V.
7 GND power_in Ground reference pin; all unused inputs must be held at VCC or GND for proper operation.
8 GND power_in Ground reference pin (second GND pin); all unused inputs must be held at VCC or GND for proper operation.
9 C input Binary channel-select input (most significant bit of the channel address); control input range is 0 to 5.5 V.
10 B input Binary channel-select input (middle bit of the channel address); control input range is 0 to 5.5 V.
11 A input Binary channel-select input (least significant bit of the channel address); control input range is 0 to 5.5 V.
12 Y3 passive Analog switch channel 3 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
13 Y0 passive Analog switch channel 0 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
14 Y1 passive Analog switch channel 1 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
15 Y2 passive Analog switch channel 2 terminal; signals up to 5.5 V (peak) can pass in either direction, with switch I/O limited to −0.5 V to VCC + 0.5 V (5.5 V max).
16 VCC power_in Positive supply pin; recommended operation is 2 V to 5.5 V, and absolute maximum is 7.0 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16-175mil
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN74LV4051ATPWREP
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16-175mil (KiCad packages3D, STEP)
  • 3D model files: sn74lv4051atpwrep-etched.step / sn74lv4051atpwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv4051atpwrep.step / sn74lv4051atpwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 e0d1dea88834f97c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF