SN74LS21DR

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74ls21dr",
  "title": "SN74LS21DR",
  "brief": "Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74ls21dr"
  ],
  "component": {
    "mpn": "SN74LS21DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ls21.pdf",
    "parts": {
      "symbol": "sn74ls21dr.kicad_sym",
      "footprint": "sn74ls21dr.kicad_mod",
      "model_3d": "sn74ls21dr-etched.glb",
      "model_3d_plain": "sn74ls21dr.glb",
      "model_3d_step": "sn74ls21dr-etched.step",
      "model_3d_step_plain": "sn74ls21dr.step",
      "lbr": "sn74ls21dr.lbr"
    },
    "distributor_links": {
      "digikey": "296-38800-2-ND",
      "mouser": "595-SN74LS21DR",
      "lcsc": "C2863615"
    },
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 input A. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V. Input current IIH = 20 uA max at 2.7 V; IIL = -0.4 mA max at 0.4 V."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 input B. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "3",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection. Leave floating or tie to a convenient net."
      },
      {
        "number": "4",
        "name": "1C",
        "type": "input",
        "description": "Gate 1 input C. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "5",
        "name": "1D",
        "type": "input",
        "description": "Gate 1 input D. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "6",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 output. Y = 1A AND 1B AND 1C AND 1D (positive logic). LSTTL totem-pole output; VOH >= 2.7 V at IOH = -0.4 mA; VOL <= 0.5 V at IOL = 8 mA."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference (0 V)."
      },
      {
        "number": "8",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 output. Y = 2A AND 2B AND 2C AND 2D (positive logic). LSTTL totem-pole output; VOH >= 2.7 V at IOH = -0.4 mA; VOL <= 0.5 V at IOL = 8 mA."
      },
      {
        "number": "9",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 input A. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "10",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 input B. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "11",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection. Leave floating or tie to a convenient net."
      },
      {
        "number": "12",
        "name": "2C",
        "type": "input",
        "description": "Gate 2 input C. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "13",
        "name": "2D",
        "type": "input",
        "description": "Gate 2 input D. LSTTL logic input; VIH >= 2 V, VIL <= 0.8 V."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Recommended 4.75-5.25 V (SN74LS21), absolute maximum 7 V. Typical ICCH = 1.2 mA, ICCL = 2.2 mA."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74ls21.pdf",
        "pages": 20,
        "sha256": "de3373b5914eb45e",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -3.81
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74LS21",
      "logic_family": "74LS",
      "function_code": "21",
      "function_class": "Gate",
      "function_name": "Dual 4-Input AND Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74ls21dr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74ls21dr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "7ecd1faed6126cd0e1683b6a02160a67005c671f866bfca958e454257c4b65d2",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74ls21dr"
  ],
  "discovery_pitch": "SN74LS21DR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74ls21dr.kicad_sym",
    "sn74ls21dr.kicad_mod",
    "sn74ls21dr.glb",
    "sn74ls21dr.step",
    "sn74ls21dr-etched.step",
    "sn74ls21dr.lbr",
    "docs/hero.png",
    "docs/sn74ls21dr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74LS21DRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRNE4",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRNSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LS21DRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:17:33.114Z"
}