component
SN74HC86
Public Made by Adomby adom
TI quad 2-input exclusive-OR gate, SOIC-14. Output high when inputs differ. HC CMOS 2-6 V. Datasheet-verified.
main
Ray
sn74hc86: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
44b35fe
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{
"schema_version": 1,
"type": "component",
"slug": "sn74hc86",
"title": "SN74HC86",
"brief": "TI quad 2-input exclusive-OR gate, SOIC-14. Output high when inputs differ. HC CMOS 2-6 V. Datasheet-verified.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"xor",
"exclusive-or",
"74hc",
"soic-14",
"texas-instruments"
],
"component": {
"mpn": "SN74HC86",
"manufacturer": "Texas Instruments",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic IC",
"subcategory": "Quad 2-input XOR gate",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc86.pdf",
"parts": {
"symbol": "sn74hc86.kicad_sym",
"footprint": "sn74hc86.kicad_mod",
"model_3d": "sn74hc86-etched.glb",
"model_3d_plain": "sn74hc86.glb",
"lbr": "sn74hc86.lbr",
"model_3d_step": "sn74hc86-etched.step",
"model_3d_step_plain": "sn74hc86.step"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "1A",
"type": "input",
"description": "Channel 1, Input A. CMOS logic input to XOR gate 1. V_IH ≥ 3.15 V @ V_CC = 4.5 V; input leakage ±0.1 µA typ."
},
{
"number": "2",
"name": "1B",
"type": "input",
"description": "Channel 1, Input B. CMOS logic input to XOR gate 1. V_IH ≥ 3.15 V @ V_CC = 4.5 V; input leakage ±0.1 µA typ."
},
{
"number": "3",
"name": "1Y",
"type": "output",
"description": "Channel 1, Output Y = 1A ⊕ 1B. Push-pull CMOS output; I_OH/I_OL up to ±5.2 mA @ V_CC = 6 V."
},
{
"number": "4",
"name": "2A",
"type": "input",
"description": "Channel 2, Input A. CMOS logic input to XOR gate 2."
},
{
"number": "5",
"name": "2B",
"type": "input",
"description": "Channel 2, Input B. CMOS logic input to XOR gate 2."
},
{
"number": "6",
"name": "2Y",
"type": "output",
"description": "Channel 2, Output Y = 2A ⊕ 2B. Push-pull CMOS output."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V). Return path for supply and outputs."
},
{
"number": "8",
"name": "3Y",
"type": "output",
"description": "Channel 3, Output Y = 3A ⊕ 3B. Push-pull CMOS output."
},
{
"number": "9",
"name": "3A",
"type": "input",
"description": "Channel 3, Input A. CMOS logic input to XOR gate 3."
},
{
"number": "10",
"name": "3B",
"type": "input",
"description": "Channel 3, Input B. CMOS logic input to XOR gate 3."
},
{
"number": "11",
"name": "4Y",
"type": "output",
"description": "Channel 4, Output Y = 4A ⊕ 4B. Push-pull CMOS output."
},
{
"number": "12",
"name": "4A",
"type": "input",
"description": "Channel 4, Input A. CMOS logic input to XOR gate 4."
},
{
"number": "13",
"name": "4B",
"type": "input",
"description": "Channel 4, Input B. CMOS logic input to XOR gate 4."
},
{
"number": "14",
"name": "VCC",
"type": "power_in",
"description": "Positive supply. Operating range 2 V to 6 V (absolute max 7 V). Recommend local 0.1 µF decoupling to GND."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/sn74hc86.pdf",
"pages": 37,
"sha256": "ed3f0a492555eef7",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "74HC86",
"logic_family": "74HC",
"function_code": "86",
"function_class": "Gate",
"function_name": "Quad 2-Input XOR Gate",
"manufacturer": "Texas Instruments",
"is_specialty": false
},
"models_3d": [
{
"file": "sn74hc86.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
8.7,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74hc86-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
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],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "4964c237391a6efa27fa409e3d76df21aa539d1b10e4f87f40219a31bf1fe7ae",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Type": "Quad 2-input XOR gate",
"Gates": "4 independent",
"Function": "Y = A XOR B (high when inputs differ)",
"Logic family": "HC (high-speed CMOS)",
"Supply voltage": "2-6 V",
"Common uses": "parity, adders, phase detect",
"Package": "SOIC-14",
"Body (L×W×H)": "8.65 × 3.9 × 1.75 mm"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sn74hc86",
"74hc86",
"xor gate",
"exclusive or",
"parity gate"
],
"discovery_pitch": "SN74HC86 quad 2-input exclusive-OR gate (SOIC-14) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sn74hc86.kicad_sym",
"sn74hc86.kicad_mod",
"sn74hc86.glb",
"sn74hc86.lbr",
"docs/hero.png",
"docs/sn74hc86-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sn74hc86-etched.step"
],
"variants": [
{
"mpn": "SN74HC86D (SOIC-14, tube)",
"kind": "packaging"
},
{
"mpn": "SN74HC86DR (SOIC-14, tape & reel)",
"kind": "packaging"
}
]
}