component

SN74HC366N

Public Made by Adom

by adom

XBLW Buffers, Drivers, Receivers, Transceivers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74hc366nfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers sn74hc366n: viewers · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
sn74hc366n-etched.glb Publish 0.1.0 · Ray 5d ago
sn74hc366n-etched.step sn74hc366n: factory component page (tier=lcsc) · Ray 5d ago
sn74hc366n-hero.glb sn74hc366n: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
sn74hc366n-hero.overlay.json Publish 0.1.0 · Ray 5d ago
sn74hc366n.glb Publish 0.1.0 · Ray 5d ago
sn74hc366n.kicad_mod Publish 0.1.0 · Ray 5d ago
sn74hc366n.kicad_sym Publish 0.1.0 · Ray 5d ago
sn74hc366n.lbr Publish 0.1.0 · Ray 5d ago
sn74hc366n.step Publish 0.1.0 · Ray 5d ago

SN74HC366N

XBLW · Buffers, Drivers, Receivers, Transceivers · DIP-16

SN74HC366N from XBLW, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable input 1, active LOW; a HIGH on this pin forces the associated outputs into the high-impedance OFF-state.
2 1A input Data input 1 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
3 1Y output Data output 1, inverting 3-state output that is high impedance when its output enable is HIGH.
4 2A input Data input 2 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
5 2Y output Data output 2, inverting 3-state output that is high impedance when its output enable is HIGH.
6 3A input Data input 3 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
7 3Y output Data output 3, inverting 3-state output that is high impedance when its output enable is HIGH.
8 GND power_in Ground reference (0 V); all voltages are referenced to this pin.
9 4Y output Data output 4, inverting 3-state output that is high impedance when its output enable is HIGH.
10 4A input Data input 4 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
11 5Y output Data output 5, inverting 3-state output that is high impedance when its output enable is HIGH.
12 5A input Data input 5 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
13 6Y output Data output 6, inverting 3-state output that is high impedance when its output enable is HIGH.
14 6A input Data input 6 of the inverting buffer; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC.
15 OE2 input Output enable input 2, active LOW; a HIGH on this pin forces the associated outputs into the high-impedance OFF-state.
16 VCC power_in Supply voltage: recommended 2.0 V to 6.0 V for SN74HC366 and 4.5 V to 5.5 V for SN74HCT366, absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer XBLW
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 4
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 4
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 4
output current IO -35 35 mA -0.5V < VO < VCC+0.5V 4
supply current ICC 70 mA 4
ground current IGND -70 mA 4
storage temperature Tstg -65 150 ℃ 4
total power dissipation Ptot 500 mW 4
soldering temperature (DIP package) TL 245 ℃ 10s, DIP 4
supply voltage (SN74HC366) VCC 2 5 6 V 4
input voltage VI 0 V 4
output voltage VO 0 V 4
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 4
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 4
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 4
ambient temperature Tamb -40 125 ℃ 4
HIGH-level input voltage VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 5
HIGH-level input voltage VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 5
HIGH-level input voltage VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 5
LOW-level input voltage VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 5
LOW-level input voltage VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 5
LOW-level input voltage VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 5
HIGH-level output voltage VOH 1.9 2 V Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V 5
HIGH-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V 5
HIGH-level output voltage VOH 5.9 6 V Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V 5
HIGH-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V 5
HIGH-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V 5
LOW-level output voltage VOL 0 0.1 V Tamb=25℃; VI = VIH or VIL; IO=20uA; VCC=2.0V 5
LOW-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V 5
LOW-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI = VIH or VIL; IO=7.8mA; VCC=6.0V 5
input leakage current II -1 1 uA Tamb=25℃; VI=VCC or GND; VCC=6.0V 5
OFF-state output current IOZ -1 1 uA Tamb=25℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 5
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 5
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +125℃; VCC=2.0V 7
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +125℃; VCC=4.5V 7
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +125℃; VCC=6.0V 7
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +125℃; VCC=2.0V 7
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +125℃; VCC=4.5V 7
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +125℃; VCC=6.0V 7
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V 7
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V 7
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V 7
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V 7
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V 7
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=20uA; VCC=2.0V 7
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V 7
input leakage current II -1 1 uA Tamb=-40℃ to +125℃; VI=VCC or GND; VCC=6.0V 7
OFF-state output current IOZ -10 10 uA Tamb=-40℃ to +125℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 7
supply current ICC 160 uA Tamb=-40℃ to +125℃; VI=VCC or GND; IO=0A; VCC=6.0V 7
propagation delay nA to nY tpd 150 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=2.0V 10
propagation delay nA to nY tpd 30 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=4.5V 10
propagation delay nA to nY tpd 26 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=6.0V 10
output enable time OEn to nY ten 225 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=2.0V 10
output enable time OEn to nY ten 45 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=4.5V 10
output enable time OEn to nY ten 38 ns Tamb=-40℃ to +125℃; CL=50pF; VCC=6.0V 10

CAD (KiCad official)

  • Symbol: SN74HC366N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc366n-etched.step / sn74hc366n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc366n.step / sn74hc366n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (16 pp, sha256 add03243e0522bf3, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF