SN74HC283N

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hc283n",
  "title": "SN74HC283N",
  "brief": "lingxingic Specialty Logic, DIP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74hc283n"
  ],
  "component": {
    "mpn": "SN74HC283N",
    "manufacturer": "lingxingic",
    "package": "DIP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Specialty Logic",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603372366323986432",
    "parts": {
      "symbol": "sn74hc283n.kicad_sym",
      "footprint": "sn74hc283n.kicad_mod",
      "model_3d": "sn74hc283n-etched.glb",
      "model_3d_plain": "sn74hc283n.glb",
      "model_3d_step": "sn74hc283n-etched.step",
      "model_3d_step_plain": "sn74hc283n.step",
      "lbr": "sn74hc283n.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "S2",
        "type": "output",
        "description": "Sum output bit 2. Represents the second bit of the binary sum of A + B + CIN. Push-pull CMOS output."
      },
      {
        "number": "2",
        "name": "B2",
        "type": "input",
        "description": "B operand input bit 2. CMOS-level logic input for the second bit of the B operand."
      },
      {
        "number": "3",
        "name": "A2",
        "type": "input",
        "description": "A operand input bit 2. CMOS-level logic input for the second bit of the A operand."
      },
      {
        "number": "4",
        "name": "S1",
        "type": "output",
        "description": "Sum output bit 1 (LSB). Represents the least-significant bit of the binary sum of A + B + CIN."
      },
      {
        "number": "5",
        "name": "A1",
        "type": "input",
        "description": "A operand input bit 1 (LSB). CMOS-level logic input for the least-significant bit of the A operand."
      },
      {
        "number": "6",
        "name": "B1",
        "type": "input",
        "description": "B operand input bit 1 (LSB). CMOS-level logic input for the least-significant bit of the B operand."
      },
      {
        "number": "7",
        "name": "CIN",
        "type": "input",
        "description": "Carry input. Incoming carry bit added to the A+B sum. Tie to GND (active-HIGH operation) or VCC (active-LOW operation) when no carry-in is intended; used when cascading multiple SN74HC283 devices for wider-than-4-bit addition."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). All input and output voltages are referenced to this pin."
      },
      {
        "number": "9",
        "name": "COUT",
        "type": "output",
        "description": "Carry output. Outgoing carry bit resulting from A + B + CIN. Connect to the CIN of the next-higher SN74HC283 stage when cascading to build wider adders."
      },
      {
        "number": "10",
        "name": "S4",
        "type": "output",
        "description": "Sum output bit 4 (MSB). Represents the most-significant bit of the 4-bit binary sum."
      },
      {
        "number": "11",
        "name": "B4",
        "type": "input",
        "description": "B operand input bit 4 (MSB). CMOS-level logic input for the most-significant bit of the B operand."
      },
      {
        "number": "12",
        "name": "A4",
        "type": "input",
        "description": "A operand input bit 4 (MSB). CMOS-level logic input for the most-significant bit of the A operand."
      },
      {
        "number": "13",
        "name": "S3",
        "type": "output",
        "description": "Sum output bit 3. Represents the third bit of the binary sum of A + B + CIN."
      },
      {
        "number": "14",
        "name": "A3",
        "type": "input",
        "description": "A operand input bit 3. CMOS-level logic input for the third bit of the A operand."
      },
      {
        "number": "15",
        "name": "B3",
        "type": "input",
        "description": "B operand input bit 3. CMOS-level logic input for the third bit of the B operand."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage. Operating range 2.0 V to 6.0 V (SN74HC283); absolute maximum 7.0 V. Bypass with a 100 nF ceramic capacitor to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603372366323986432",
        "pages": 20,
        "sha256": "16ffe47b15cddb94",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC283",
      "logic_family": "74HC",
      "function_code": "283",
      "function_class": "Adder",
      "function_name": "4-Bit Binary Full Adder with Fast Carry",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hc283n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          19.177,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "17a30b1f0ab3fd5384a1231e3c63c394888d5b952c542a8c189e023ed3467464",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc283n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          19.177,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "57f077b74d713b8a1fe7c985604126b72afa7333dbe3db68b808a1401bea8ef4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "lingxingic",
      "Package": "DIP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "variants": [
    {
      "mpn": "SN74HC283NN(LX)",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC283ND(LX)",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC283NDR(LX)",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC283NPW(LX)",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74hc283n"
  ],
  "discovery_pitch": "SN74HC283N (lingxingic) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc283n.kicad_sym",
    "sn74hc283n.kicad_mod",
    "sn74hc283n.glb",
    "sn74hc283n.step",
    "sn74hc283n.lbr",
    "docs/hero.png",
    "docs/sn74hc283n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T07:05:35.077Z"
}