component
SN74HC273QDWRG4Q1
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC273QDWRG4Q1
Texas Instruments · Flip Flops · SOIC-20-300mil
SN74HC273QDWRG4Q1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Direct clear input; when low it resets all Q outputs to low regardless of CLK, per the function table. |
| 2 | 1Q | output | Flip-flop 1 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 3 | 1D | input | Data input to flip-flop 1, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 4 | 2D | input | Data input to flip-flop 2, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 5 | 2Q | output | Flip-flop 2 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 6 | 3Q | output | Flip-flop 3 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 7 | 3D | input | Data input to flip-flop 3, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 8 | 4D | input | Data input to flip-flop 4, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 9 | 4Q | output | Flip-flop 4 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CLK | input | Common clock input; data is transferred to the Q outputs on the positive-going edge, and the D inputs have no effect when CLK is held high or low. |
| 12 | 5Q | output | Flip-flop 5 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 13 | 5D | input | Data input to flip-flop 5, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 14 | 6D | input | Data input to flip-flop 6, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 15 | 6Q | output | Flip-flop 6 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 16 | 7Q | output | Flip-flop 7 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 17 | 7D | input | Data input to flip-flop 7, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 18 | 8D | input | Data input to flip-flop 8, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 19 | 8Q | output | Flip-flop 8 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 20 | VCC | power_in | Supply voltage; recommended operating range is 2 V to 6 V, with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74HC273QDWRG4Q1 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74hc273qdwrg4q1-etched.step/sn74hc273qdwrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc273qdwrg4q1.step/sn74hc273qdwrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
d61ed979e031facb, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC273QDWRG4Q1
**Texas Instruments** · Flip Flops · SOIC-20-300mil
SN74HC273QDWRG4Q1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLR | input | Direct clear input; when low it resets all Q outputs to low regardless of CLK, per the function table. |
| 2 | 1Q | output | Flip-flop 1 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 3 | 1D | input | Data input to flip-flop 1, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 4 | 2D | input | Data input to flip-flop 2, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 5 | 2Q | output | Flip-flop 2 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 6 | 3Q | output | Flip-flop 3 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 7 | 3D | input | Data input to flip-flop 3, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 8 | 4D | input | Data input to flip-flop 4, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 9 | 4Q | output | Flip-flop 4 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CLK | input | Common clock input; data is transferred to the Q outputs on the positive-going edge, and the D inputs have no effect when CLK is held high or low. |
| 12 | 5Q | output | Flip-flop 5 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 13 | 5D | input | Data input to flip-flop 5, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 14 | 6D | input | Data input to flip-flop 6, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 15 | 6Q | output | Flip-flop 6 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 16 | 7Q | output | Flip-flop 7 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 17 | 7D | input | Data input to flip-flop 7, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 18 | 8D | input | Data input to flip-flop 8, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |
| 19 | 8Q | output | Flip-flop 8 output, transferring the D input on the positive-going CLK edge; single-rail output. |
| 20 | VCC | power_in | Supply voltage; recommended operating range is 2 V to 6 V, with an absolute maximum of 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74HC273QDWRG4Q1`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74hc273qdwrg4q1-etched.step` / `sn74hc273qdwrg4q1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc273qdwrg4q1.step` / `sn74hc273qdwrg4q1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc273-q1) (16 pp, sha256 `d61ed979e031facb`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc273qdwrg4q1-datasheet.pdf)