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SN74HC273QDWRG4Q1
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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# SN74HC273QDWRG4Q1++**Texas Instruments** · Flip Flops · SOIC-20-300mil++SN74HC273QDWRG4Q1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLR | input | Direct clear input; when low it resets all Q outputs to low regardless of CLK, per the function table. |+| 2 | 1Q | output | Flip-flop 1 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 3 | 1D | input | Data input to flip-flop 1, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 4 | 2D | input | Data input to flip-flop 2, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 5 | 2Q | output | Flip-flop 2 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 6 | 3Q | output | Flip-flop 3 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 7 | 3D | input | Data input to flip-flop 3, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 8 | 4D | input | Data input to flip-flop 4, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 9 | 4Q | output | Flip-flop 4 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 10 | GND | power_in | Ground reference for the device. |+| 11 | CLK | input | Common clock input; data is transferred to the Q outputs on the positive-going edge, and the D inputs have no effect when CLK is held high or low. |+| 12 | 5Q | output | Flip-flop 5 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 13 | 5D | input | Data input to flip-flop 5, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 14 | 6D | input | Data input to flip-flop 6, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 15 | 6Q | output | Flip-flop 6 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 16 | 7Q | output | Flip-flop 7 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 17 | 7D | input | Data input to flip-flop 7, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 18 | 8D | input | Data input to flip-flop 8, transferred to Q on the positive-going CLK edge when setup and hold requirements are met. |+| 19 | 8Q | output | Flip-flop 8 output, transferring the D input on the positive-going CLK edge; single-rail output. |+| 20 | VCC | power_in | Supply voltage; recommended operating range is 2 V to 6 V, with an absolute maximum of 7 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20-300mil |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74HC273QDWRG4Q1`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)+- 3D model files: `sn74hc273qdwrg4q1-etched.step` / `sn74hc273qdwrg4q1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc273qdwrg4q1.step` / `sn74hc273qdwrg4q1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc273-q1) (16 pp, sha256 `d61ed979e031facb`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc273qdwrg4q1-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "sn74hc273qdwrg4q1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74hc273qdwrg4q1.kicad_sym",+ "sn74hc273qdwrg4q1.kicad_mod",+ "sn74hc273qdwrg4q1.glb",+ "sn74hc273qdwrg4q1.step",+ "sn74hc273qdwrg4q1.lbr",+ "docs/hero.png",+ "docs/sn74hc273qdwrg4q1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn74hc273qdwrg4q1-hero.glb",+ "sn74hc273qdwrg4q1-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN74HC273QDWRG4Q1",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-20-300mil",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/cn/lit/gpn/sn74hc273-q1",+ "parts": {+ "symbol": "sn74hc273qdwrg4q1.kicad_sym",+ "footprint": "sn74hc273qdwrg4q1.kicad_mod",+ "model_3d": "sn74hc273qdwrg4q1-hero.glb",+ "model_3d_plain": "sn74hc273qdwrg4q1.glb",+ "model_3d_step": "sn74hc273qdwrg4q1-etched.step",+ "model_3d_step_plain": "sn74hc273qdwrg4q1.step",+ "lbr": "sn74hc273qdwrg4q1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2869945",+ "digikey": "296-SN74HC273QDWRG4Q1TR-ND",+ "mouser": "595-N74HC273QDWRG4Q1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:50:53Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-SN74HC273QDWRG4Q1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-N74HC273QDWRG4Q1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CLR",+ "type": "input",+ "description": "Direct clear input; when low it resets all Q outputs to low regardless of CLK, per the function table."+ },+ {+ "number": "2",+ "name": "1Q",+ "type": "output",+ "description": "Flip-flop 1 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "3",+ "name": "1D",+ "type": "input",+ "description": "Data input to flip-flop 1, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "4",+ "name": "2D",+ "type": "input",+ "description": "Data input to flip-flop 2, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "5",+ "name": "2Q",+ "type": "output",+ "description": "Flip-flop 2 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "6",+ "name": "3Q",+ "type": "output",+ "description": "Flip-flop 3 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "7",+ "name": "3D",+ "type": "input",+ "description": "Data input to flip-flop 3, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "8",+ "name": "4D",+ "type": "input",+ "description": "Data input to flip-flop 4, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "9",+ "name": "4Q",+ "type": "output",+ "description": "Flip-flop 4 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "11",+ "name": "CLK",+ "type": "input",+ "description": "Common clock input; data is transferred to the Q outputs on the positive-going edge, and the D inputs have no effect when CLK is held high or low."+ },+ {+ "number": "12",+ "name": "5Q",+ "type": "output",+ "description": "Flip-flop 5 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "13",+ "name": "5D",+ "type": "input",+ "description": "Data input to flip-flop 5, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "14",+ "name": "6D",+ "type": "input",+ "description": "Data input to flip-flop 6, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "15",+ "name": "6Q",+ "type": "output",+ "description": "Flip-flop 6 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "16",+ "name": "7Q",+ "type": "output",+ "description": "Flip-flop 7 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "17",+ "name": "7D",+ "type": "input",+ "description": "Data input to flip-flop 7, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "18",+ "name": "8D",+ "type": "input",+ "description": "Data input to flip-flop 8, transferred to Q on the positive-going CLK edge when setup and hold requirements are met."+ },+ {+ "number": "19",+ "name": "8Q",+ "type": "output",+ "description": "Flip-flop 8 output, transferring the D input on the positive-going CLK edge; single-rail output."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage; recommended operating range is 2 V to 6 V, with an absolute maximum of 7 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbers were reconstructed from the text-extracted TOP VIEW listing (pins 1-10 left column, 20-1; Ordering table lists the DW part as SN74HC273QDWRQ1, while the Package Option Addendum lists the ord"+ ],+ "pages_sent": 16,+ "cost_usd": 0.0745,+ "at": "2026-10-08T16:50:33"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74hc273-q1",+ "pages": 16,+ "sha256": "d61ed979e031facb",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74hc273qdwrg4q1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74hc273qdwrg4q1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b3b4f272a5647b85d3374ae065f18c7f4e75e9e54f86dfd9717c849dddee2b2b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}