SN74HC21PWR

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  "type": "component",
  "slug": "sn74hc21pwr",
  "title": "SN74HC21PWR",
  "brief": "Texas Instruments Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "logic",
    "sn74hc21pwr"
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  "component": {
    "mpn": "SN74HC21PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc21.pdf",
    "parts": {
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      "footprint": "sn74hc21pwr.kicad_mod",
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      "model_3d_plain": "sn74hc21pwr.glb",
      "model_3d_step": "sn74hc21pwr-etched.step",
      "model_3d_step_plain": "sn74hc21pwr.step",
      "lbr": "sn74hc21pwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-15846-2-ND",
      "mouser": "595-SN74HC21PWR",
      "lcsc": "C507237"
    },
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Channel 1, Input A. Standard high-impedance CMOS logic input for the first 4-input AND gate. VIH ≥ 3.15 V @ VCC=4.5 V; VIL ≤ 1.35 V @ VCC=4.5 V."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Channel 1, Input B. Standard high-impedance CMOS logic input for the first 4-input AND gate."
      },
      {
        "number": "3",
        "name": "NC",
        "type": "unconnected",
        "description": "Not internally connected. Leave floating or tie to a defined level per board practice."
      },
      {
        "number": "4",
        "name": "1C",
        "type": "input",
        "description": "Channel 1, Input C. Standard high-impedance CMOS logic input for the first 4-input AND gate."
      },
      {
        "number": "5",
        "name": "1D",
        "type": "input",
        "description": "Channel 1, Input D. Standard high-impedance CMOS logic input for the first 4-input AND gate."
      },
      {
        "number": "6",
        "name": "1Y",
        "type": "output",
        "description": "Channel 1, Output Y. Balanced CMOS push-pull output; 1Y = 1A · 1B · 1C · 1D. IOH/IOL rated ±4 mA at VCC=4.5 V and ±5.2 mA at VCC=6 V."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). Common return for VCC supply and all logic inputs/outputs."
      },
      {
        "number": "8",
        "name": "2Y",
        "type": "output",
        "description": "Channel 2, Output Y. Balanced CMOS push-pull output; 2Y = 2A · 2B · 2C · 2D."
      },
      {
        "number": "9",
        "name": "2A",
        "type": "input",
        "description": "Channel 2, Input A. Standard high-impedance CMOS logic input for the second 4-input AND gate."
      },
      {
        "number": "10",
        "name": "2B",
        "type": "input",
        "description": "Channel 2, Input B. Standard high-impedance CMOS logic input for the second 4-input AND gate."
      },
      {
        "number": "11",
        "name": "NC",
        "type": "unconnected",
        "description": "Not internally connected. Leave floating or tie to a defined level per board practice."
      },
      {
        "number": "12",
        "name": "2C",
        "type": "input",
        "description": "Channel 2, Input C. Standard high-impedance CMOS logic input for the second 4-input AND gate."
      },
      {
        "number": "13",
        "name": "2D",
        "type": "input",
        "description": "Channel 2, Input D. Standard high-impedance CMOS logic input for the second 4-input AND gate."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Recommended operating range 2 V to 6 V (nominal 5 V); absolute maximum 7 V. Bypass with a ceramic capacitor close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc21.pdf",
        "pages": 34,
        "sha256": "d9553773c8d57248",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -1.95
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-14_4.4x5mm_P0.65mm@sha256:e4bf82cea6d3b325",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HC21",
      "logic_family": "74HC",
      "function_code": "21",
      "function_class": "Gate",
      "function_name": "Dual 4-Input AND Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
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        "seat": "z = 0",
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-07",
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        "checked": "2026-10-07",
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      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
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  "discovery_triggers": [
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  "discovery_pitch": "SN74HC21PWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
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  "files": [
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    "README.md",
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  "visibility": {
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  "variants": [
    {
      "mpn": "SN74HC21PWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC21PWRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC21PWRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC21PWRNS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC21PWRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HC21PWRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:03:14.525Z"
}