SN74HC166N

{
  "slug": "sn74hc166n",
  "version": "0.1.0",
  "type": "component",
  "description": "lingxingic Shift Registers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "sn74hc166n",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc166n.kicad_sym",
    "sn74hc166n.kicad_mod",
    "sn74hc166n.glb",
    "sn74hc166n.step",
    "sn74hc166n.lbr",
    "docs/hero.png",
    "docs/sn74hc166n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74hc166n-hero.glb",
    "sn74hc166n-hero.overlay.json",
    "sn74hc166n-etched.glb"
  ],
  "component": {
    "mpn": "SN74HC166N",
    "manufacturer": "lingxingic",
    "package": "DIP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590921432656662528",
    "parts": {
      "symbol": "sn74hc166n.kicad_sym",
      "footprint": "sn74hc166n.kicad_mod",
      "model_3d": "sn74hc166n-hero.glb",
      "model_3d_plain": "sn74hc166n-etched.glb",
      "model_3d_step": "sn74hc166n-etched.step",
      "model_3d_step_plain": "sn74hc166n.step",
      "lbr": "sn74hc166n.lbr"
    },
    "distributor_links": {
      "lcsc": "C22384756",
      "digikey": "2156-SN74HC166N-ND",
      "mouser": "595-SN74HC166N"
    },
    "distributor_check": {
      "checked_at": "2026-10-16T00:32:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-SN74HC166N-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-SN74HC166N",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DS",
        "type": "input",
        "description": "Serial data input to the first register stage (Q0), sampled on the LOW-to-HIGH clock edge during a serial shift."
      },
      {
        "number": "2",
        "name": "D0",
        "type": "input",
        "description": "Parallel data input D0, loaded into register Q0 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "3",
        "name": "D1",
        "type": "input",
        "description": "Parallel data input D1, loaded into register Q1 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "4",
        "name": "D2",
        "type": "input",
        "description": "Parallel data input D2, loaded into register Q2 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "5",
        "name": "D3",
        "type": "input",
        "description": "Parallel data input D3, loaded into register Q3 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "6",
        "name": "CE",
        "type": "input",
        "description": "Clock enable input, active LOW; when HIGH the clock is inhibited and the register holds its state."
      },
      {
        "number": "7",
        "name": "CP",
        "type": "input",
        "description": "Clock input, triggered on the LOW-to-HIGH edge."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V)."
      },
      {
        "number": "9",
        "name": "MR",
        "type": "input",
        "description": "Asynchronous master reset, active LOW; clears the register independently of the clock."
      },
      {
        "number": "10",
        "name": "D4",
        "type": "input",
        "description": "Parallel data input D4, loaded into register Q4 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "11",
        "name": "D5",
        "type": "input",
        "description": "Parallel data input D5, loaded into register Q5 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "12",
        "name": "D6",
        "type": "input",
        "description": "Parallel data input D6, loaded into register Q6 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "13",
        "name": "Q7",
        "type": "output",
        "description": "Serial output from the last register stage."
      },
      {
        "number": "14",
        "name": "D7",
        "type": "input",
        "description": "Parallel data input D7, loaded into register Q7 on a LOW-to-HIGH CP edge when PE and CE are LOW."
      },
      {
        "number": "15",
        "name": "PE",
        "type": "input",
        "description": "Parallel enable input, active LOW; selects parallel load of D0 to D7 when LOW and serial shift when HIGH."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage: 2.0 V to 6.0 V for SN74HC166 and 4.5 V to 5.5 V for SN74HCT166 (recommended operating range)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DIP16 pin configuration is a figure (image) in the source text; the pin-to-number mapping was ta; The datasheet gives no electrical limits per individual signal pin (no input/output voltage or curre; Datasheet covers two parts (SN74HC166N and SN74HCT166N) on the same DIP16 pinout; the VCC descriptio"
        ],
        "pages_sent": 18,
        "cost_usd": 0.0581,
        "at": "2026-10-16T00:32:01"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590921432656662528",
        "pages": 18,
        "sha256": "5bcd211dbd358081",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sn74hc166n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          19.177,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "17a30b1f0ab3fd5384a1231e3c63c394888d5b952c542a8c189e023ed3467464",
        "checked": "2026-10-16",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc166n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          19.177,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "63237a0ed19a88abc99a24d998fb5965c7d7febcc5b46438270a60b99697d4f5",
        "checked": "2026-10-16",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}