SN74HC163IPWRG4Q1

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  "slug": "sn74hc163ipwrg4q1",
  "title": "SN74HC163IPWRG4Q1",
  "brief": "Texas Instruments Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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  "component": {
    "mpn": "SN74HC163IPWRG4Q1",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters, Dividers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74hc163-q1",
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    "distributor_links": {
      "lcsc": 2675469,
      "digikey": "296-28965-2-ND",
      "mouser": "595-N74HC163IPWRG4Q1"
    },
    "distributor_check": {
      "checked_at": "2026-10-03T05:28:24Z",
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      "digikey": {
        "pn": "296-28965-2-ND",
        "status": "found"
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      "mouser": {
        "pn": "595-N74HC163IPWRG4Q1",
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    },
    "pins": [
      {
        "number": "1",
        "name": "CLR",
        "type": "input",
        "description": "Synchronous clear input (active low); resets all flip-flop outputs low on next CLK rising edge, independent of enable inputs."
      },
      {
        "number": "2",
        "name": "CLK",
        "type": "input",
        "description": "Clock input; triggers all four flip-flops on rising edge; maximum operating frequency 6-44 MHz depending on VCC and temperature."
      },
      {
        "number": "3",
        "name": "A",
        "type": "input",
        "description": "Preset data input A; loaded into QA when LOAD is low after next CLK pulse; setup time 26-38 ns before CLK."
      },
      {
        "number": "4",
        "name": "B",
        "type": "input",
        "description": "Preset data input B; loaded into QB when LOAD is low after next CLK pulse; setup time 26-38 ns before CLK."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Preset data input C; loaded into QC when LOAD is low after next CLK pulse; setup time 26-38 ns before CLK."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Preset data input D; loaded into QD when LOAD is low after next CLK pulse; setup time 26-38 ns before CLK."
      },
      {
        "number": "7",
        "name": "ENP",
        "type": "input",
        "description": "Count enable input (active high); counting occurs only when both ENP and ENT are high; setup time 29-38 ns before CLK."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V); maximum continuous current ±50 mA."
      },
      {
        "number": "9",
        "name": "LOAD",
        "type": "input",
        "description": "Synchronous load input (active low); causes outputs to load preset data after next CLK pulse; setup time 23-29 ns before CLK."
      },
      {
        "number": "10",
        "name": "ENT",
        "type": "input",
        "description": "Synchronous toggle/count enable input (active high); counting requires both ENT and ENP high; fed forward to enable RCO; setup time 29-43 ns before CLK."
      },
      {
        "number": "11",
        "name": "QD",
        "type": "output",
        "description": "Output of D flip-flop (least significant bit); maximum output current ±25 mA continuous; propagation delay 21-51 ns from CLK rising edge."
      },
      {
        "number": "12",
        "name": "QC",
        "type": "output",
        "description": "Output of C flip-flop; maximum output current ±25 mA continuous; propagation delay 21-51 ns from CLK rising edge."
      },
      {
        "number": "13",
        "name": "QB",
        "type": "output",
        "description": "Output of B flip-flop; maximum output current ±25 mA continuous; propagation delay 21-51 ns from CLK rising edge."
      },
      {
        "number": "14",
        "name": "QA",
        "type": "output",
        "description": "Output of A flip-flop (most significant bit); maximum output current ±25 mA continuous; propagation delay 21-51 ns from CLK rising edge."
      },
      {
        "number": "15",
        "name": "RCO",
        "type": "output",
        "description": "Ripple carry output (active high); produces high-level pulse when counter reaches maximum count (9 or 15 with QA high); propagation delay 20-54 ns from CLK."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; recommended operating range 2 V to 6 V; maximum continuous current ±50 mA."
      }
    ],
    "provenance": {
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      "factory_chain": {
        "factory": "2.0.0",
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        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 20,
        "cost_usd": 0.1584,
        "at": "2026-10-03T05:28:00"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/sn74hc163-q1",
        "pages": 20,
        "sha256": "6675e23ba20c09b0",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
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        "refuses_to_fabricate": true
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
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  "discovery_pitch": "SN74HC163IPWRG4Q1 (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
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