component

SN74AXC4T774PWR

Public Made by Adom

by adom

Texas Instruments Translators / Level Shifters, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74axc4t774pwr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74axc4t774pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json sn74axc4t774pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray 14d ago
README.md sn74axc4t774pwr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago
sn74axc4t774pwr-etched.fit.json sn74axc4t774pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
sn74axc4t774pwr-etched.glb sn74axc4t774pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray 14d ago
sn74axc4t774pwr-etched.step sn74axc4t774pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray 14d ago
sn74axc4t774pwr.glb Publish 0.1.0 · Ray 2mo ago
sn74axc4t774pwr.kicad_mod Publish 0.1.0 · Ray 2mo ago
sn74axc4t774pwr.kicad_sym Publish 0.1.0 · Ray 2mo ago
sn74axc4t774pwr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
sn74axc4t774pwr.step Publish 0.1.0 · Ray 2mo ago

SN74AXC4T774PWR

Texas Instruments · Translators / Level Shifters · TSSOP-16

SN74AXC4T774PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR1 input Direction-control input for port 1. Logic level (referenced to VCCA) selects the data flow direction for the A1/B1 channel: A→B when high, B→A when low.
2 DIR2 input Direction-control input for port 2. Logic level (referenced to VCCA) selects the data flow direction for the A2/B2 channel.
3 A1 bidirectional A-port I/O for channel 1, referenced to VCCA (0.65 V to 3.6 V). Direction is set by DIR1; disabled to Hi-Z when OE is high.
4 A2 bidirectional A-port I/O for channel 2, referenced to VCCA (0.65 V to 3.6 V). Direction is set by DIR2; disabled to Hi-Z when OE is high.
5 A3 bidirectional A-port I/O for channel 3, referenced to VCCA (0.65 V to 3.6 V). Direction is set by DIR3; disabled to Hi-Z when OE is high.
6 A4 bidirectional A-port I/O for channel 4, referenced to VCCA (0.65 V to 3.6 V). Direction is set by DIR4; disabled to Hi-Z when OE is high.
7 DIR3 input Direction-control input for port 3. Logic level (referenced to VCCA) selects the data flow direction for the A3/B3 channel.
8 DIR4 input Direction-control input for port 4. Logic level (referenced to VCCA) selects the data flow direction for the A4/B4 channel.
9 OE input Active-low output enable, referenced to VCCA. Drive OE high to force all A- and B-port I/Os into the high-impedance (tri-state) mode; tie to VCCA through a pull-up during power sequencing to keep outputs Hi-Z.
10 GND power_in Device ground reference for both supply rails.
11 B4 bidirectional B-port I/O for channel 4, referenced to VCCB (0.65 V to 3.6 V). Direction is set by DIR4; disabled to Hi-Z when OE is high.
12 B3 bidirectional B-port I/O for channel 3, referenced to VCCB (0.65 V to 3.6 V). Direction is set by DIR3; disabled to Hi-Z when OE is high.
13 B2 bidirectional B-port I/O for channel 2, referenced to VCCB (0.65 V to 3.6 V). Direction is set by DIR2; disabled to Hi-Z when OE is high.
14 B1 bidirectional B-port I/O for channel 1, referenced to VCCB (0.65 V to 3.6 V). Direction is set by DIR1; disabled to Hi-Z when OE is high.
15 VCCB power_in B-port power supply. Sets the reference voltage for the B-side I/Os. Recommended range 0.65 V to 3.6 V; absolute max 4.2 V. Bypass with a local decoupling capacitor to GND.
16 VCCA power_in A-port power supply. Sets the reference voltage for the A-side I/Os and for the DIRx / OE control inputs. Recommended range 0.65 V to 3.6 V; absolute max 4.2 V. Bypass with a local decoupling capacitor to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SN74AXC4T774PWR
  • SN74AXC4T774PWRBQB
  • SN74AXC4T774PWRRSV

CAD (KiCad official)

  • Symbol: SN74AXC4T774PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74axc4t774pwr-etched.step / sn74axc4t774pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74axc4t774pwr.step / sn74axc4t774pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 f45cd62a9675b9f6, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF