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SN74ALS873BDWR

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Texas Instruments Latches, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ALS873BDWR

Texas Instruments · Latches · SOIC-24-300mil

SN74ALS873BDWR from Texas Instruments, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CLR input Active-low clear for latch group 1; when low, the 1Q outputs go low independently of 1LE.
2 1OE input Output enable for latch group 1; when at a high logic level, the 1Q outputs are forced to the high-impedance state.
3 1D1 input Data input for bit 1 of latch group 1; while 1LE is high the 1Q output follows this input, and it is latched when 1LE goes low (setup 10 ns, hold 7 ns).
4 1D2 input Data input for bit 2 of latch group 1; while 1LE is high the 1Q output follows this input, and it is latched when 1LE goes low (setup 10 ns, hold 7 ns).
5 1D3 input Data input for bit 3 of latch group 1; while 1LE is high the 1Q output follows this input, and it is latched when 1LE goes low (setup 10 ns, hold 7 ns).
6 1D4 input Data input for bit 4 of latch group 1; while 1LE is high the 1Q output follows this input, and it is latched when 1LE goes low (setup 10 ns, hold 7 ns).
7 2D1 input Data input for bit 1 of latch group 2; while 2LE is high the 2Q output follows this input, and it is latched when 2LE goes low (setup 10 ns, hold 7 ns).
8 2D2 input Data input for bit 2 of latch group 2; while 2LE is high the 2Q output follows this input, and it is latched when 2LE goes low (setup 10 ns, hold 7 ns).
9 2D3 input Data input for bit 3 of latch group 2; while 2LE is high the 2Q output follows this input, and it is latched when 2LE goes low (setup 10 ns, hold 7 ns).
10 2D4 input Data input for bit 4 of latch group 2; while 2LE is high the 2Q output follows this input, and it is latched when 2LE goes low (setup 10 ns, hold 7 ns).
11 2OE input Output enable for latch group 2; when at a high logic level, the 2Q outputs are forced to the high-impedance state.
12 GND power_in Ground reference pin for the device.
13 2CLR input Active-low clear for latch group 2; when low, the 2Q outputs go low independently of 2LE.
14 2LE input Latch enable for group 2; while high the 2Q outputs follow the D inputs, and when low the outputs are latched.
15 2Q4 tri_state Bit 4 3-state buffer output of latch group 2, designed to drive bus lines directly.
16 2Q3 tri_state Bit 3 3-state buffer output of latch group 2, designed to drive bus lines directly.
17 2Q2 tri_state Bit 2 3-state buffer output of latch group 2, designed to drive bus lines directly.
18 2Q1 tri_state Bit 1 3-state buffer output of latch group 2, designed to drive bus lines directly.
19 1Q4 tri_state Bit 4 3-state buffer output of latch group 1, designed to drive bus lines directly.
20 1Q3 tri_state Bit 3 3-state buffer output of latch group 1, designed to drive bus lines directly.
21 1Q2 tri_state Bit 2 3-state buffer output of latch group 1, designed to drive bus lines directly.
22 1Q1 tri_state Bit 1 3-state buffer output of latch group 1, designed to drive bus lines directly.
23 1LE input Latch enable for group 1; while high the 1Q outputs follow the D inputs, and when low the outputs are latched.
24 VCC power_in Supply voltage, recommended 4.5 V to 5.5 V with 5 V nominal (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-24-300mil
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: SN74ALS873BDWR
  • Footprint: Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm
  • 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74als873bdwr-etched.step / sn74als873bdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74als873bdwr.step / sn74als873bdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 7a37dd6b1e3368fa, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF