SN74AHCT86PWR

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74ahct86pwr",
  "title": "SN74AHCT86PWR",
  "brief": "Texas Instruments Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74ahct86pwr"
  ],
  "component": {
    "mpn": "SN74AHCT86PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ahct86.pdf",
    "parts": {
      "symbol": "sn74ahct86pwr.kicad_sym",
      "footprint": "sn74ahct86pwr.kicad_mod",
      "model_3d": "sn74ahct86pwr-etched.glb",
      "model_3d_plain": "sn74ahct86pwr.glb",
      "model_3d_step": "sn74ahct86pwr-etched.step",
      "model_3d_step_plain": "sn74ahct86pwr.step",
      "lbr": "sn74ahct86pwr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 A input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 B input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 exclusive-OR output (1Y = 1A XOR 1B). IOH = -8 mA, IOL = 8 mA."
      },
      {
        "number": "4",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 A input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "5",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 B input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 exclusive-OR output (2Y = 2A XOR 2B). IOH = -8 mA, IOL = 8 mA."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin (0 V)."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 exclusive-OR output (3Y = 3A XOR 3B). IOH = -8 mA, IOL = 8 mA."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Gate 3 A input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "10",
        "name": "3B",
        "type": "input",
        "description": "Gate 3 B input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Gate 4 exclusive-OR output (4Y = 4A XOR 4B). IOH = -8 mA, IOL = 8 mA."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Gate 4 A input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Gate 4 B input (TTL-compatible logic input). VIH min 2 V, VIL max 0.8 V."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage input. Recommended VCC range 4.5 V to 5.5 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74ahct86.pdf",
        "pages": 42,
        "sha256": "0f79b89c1a2ef105",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74AHCT86",
      "logic_family": "74AHCT",
      "function_code": "86",
      "function_class": "Gate",
      "function_name": "Quad 2-Input XOR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74ahct86pwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74ahct86pwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b0b6bac09537efd8c7669fb2d163539dfbef8addd1e730da992487404d221fe4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74ahct86pwr"
  ],
  "discovery_pitch": "SN74AHCT86PWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74ahct86pwr.kicad_sym",
    "sn74ahct86pwr.kicad_mod",
    "sn74ahct86pwr.glb",
    "sn74ahct86pwr.step",
    "sn74ahct86pwr-etched.step",
    "sn74ahct86pwr.lbr",
    "docs/hero.png",
    "docs/sn74ahct86pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74AHCT86PWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRDR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRDB",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRDBR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRDGV",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRDGVR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRNS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRNSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRRGY",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRRGYR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRBQA",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRBQAR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHCT86PWRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T06:46:36.331Z"
}