component
SN74AHCT573DBR
Public Made by Adomby adom
Texas Instruments Logic ICs, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"version": "0.1.0",
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"description": "Texas Instruments Logic ICs, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"logic ics",
"sn74ahct573dbr",
"factory-2.0.0",
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"component": {
"mpn": "SN74AHCT573DBR",
"manufacturer": "Texas Instruments",
"package": "SSOP-20-208mil",
"pin_count": 20,
"category": "Logic ICs",
"subcategory": "Logic ICs",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74ahct573dbr.pdf",
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"lbr": "sn74ahct573dbr.lbr"
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"distributor_links": {
"lcsc": "C2877486",
"digikey": "296-4756-2-ND",
"mouser": "595-SN74AHCT573DBR"
},
"distributor_check": {
"checked_at": "2026-10-18T06:24:12Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "296-4756-2-ND",
"status": "found"
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"pn": "595-SN74AHCT573DBR",
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},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "Buffered output-enable; when high, the eight Q outputs are placed in the high-impedance state, and OE should be tied to VCC through a pull-up resistor to keep the outputs high-impedance during power up or power down."
},
{
"number": "2",
"name": "1D",
"type": "input",
"description": "Data input to latch 1; while LE is high the 1Q output follows this input, and while LE is low 1Q holds the level present at this input."
},
{
"number": "3",
"name": "2D",
"type": "input",
"description": "Data input to latch 2; while LE is high the 2Q output follows this input, and while LE is low 2Q holds the level present at this input."
},
{
"number": "4",
"name": "3D",
"type": "input",
"description": "Data input to latch 3; while LE is high the 3Q output follows this input, and while LE is low 3Q holds the level present at this input."
},
{
"number": "5",
"name": "4D",
"type": "input",
"description": "Data input to latch 4; while LE is high the 4Q output follows this input, and while LE is low 4Q holds the level present at this input."
},
{
"number": "6",
"name": "5D",
"type": "input",
"description": "Data input to latch 5; while LE is high the 5Q output follows this input, and while LE is low 5Q holds the level present at this input."
},
{
"number": "7",
"name": "6D",
"type": "input",
"description": "Data input to latch 6; while LE is high the 6Q output follows this input, and while LE is low 6Q holds the level present at this input."
},
{
"number": "8",
"name": "7D",
"type": "input",
"description": "Data input to latch 7; while LE is high the 7Q output follows this input, and while LE is low 7Q holds the level present at this input."
},
{
"number": "9",
"name": "8D",
"type": "input",
"description": "Data input to latch 8; while LE is high the 8Q output follows this input, and while LE is low 8Q holds the level present at this input."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable; when high the Q outputs follow the D inputs, and when low the Q outputs are latched at the logic levels of the D inputs."
},
{
"number": "12",
"name": "8Q",
"type": "tri_state",
"description": "Output of latch 8, a 3-state output that is high-impedance when OE is high."
},
{
"number": "13",
"name": "7Q",
"type": "tri_state",
"description": "Output of latch 7, a 3-state output that is high-impedance when OE is high."
},
{
"number": "14",
"name": "6Q",
"type": "tri_state",
"description": "Output of latch 6, a 3-state output that is high-impedance when OE is high."
},
{
"number": "15",
"name": "5Q",
"type": "tri_state",
"description": "Output of latch 5, a 3-state output that is high-impedance when OE is high."
},
{
"number": "16",
"name": "4Q",
"type": "tri_state",
"description": "Output of latch 4, a 3-state output that is high-impedance when OE is high."
},
{
"number": "17",
"name": "3Q",
"type": "tri_state",
"description": "Output of latch 3, a 3-state output that is high-impedance when OE is high."
},
{
"number": "18",
"name": "2Q",
"type": "tri_state",
"description": "Output of latch 2, a 3-state output that is high-impedance when OE is high."
},
{
"number": "19",
"name": "1Q",
"type": "tri_state",
"description": "Output of latch 1, a 3-state output that is high-impedance when OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply pin; the recommended supply range is 4.5 V to 5.5 V, with a 0.1 µF bypass capacitor placed as close to the pin as possible."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin table on page 3 is a single 20-pin table shared by the DB, DGV, DW, N, NS and PW packages. T; The datasheet's Pin Functions table lists the Q pins as type 'O'. They were mapped to KiCad 'tri_sta; The datasheet's pin descriptions for the data inputs are minimal (for example '1D Input'). The descr"
],
"pages_sent": 31,
"cost_usd": 0.1003,
"at": "2026-10-18T06:20:00"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/sn74ahct573dbr.pdf",
"pages": 31,
"sha256": "6860decf78f52c4f",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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