component
SN74ACT573NSR
Public Made by Adomby adom
Texas Instruments Latches, SOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
sn74act573nsr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP)
12bc62e
6d ago
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"slug": "sn74act573nsr",
"title": "SN74ACT573NSR",
"brief": "Texas Instruments Latches, SOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
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"component": {
"mpn": "SN74ACT573NSR",
"manufacturer": "Texas Instruments",
"package": "SOP-20-208mil",
"pin_count": 20,
"category": "Logic",
"subcategory": "Latches",
"datasheet": "https://www.ti.com/cn/lit/gpn/sn74act573",
"parts": {
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"footprint": "sn74act573nsr.kicad_mod",
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"lbr": "sn74act573nsr.lbr"
},
"distributor_links": {
"lcsc": "C2675303",
"digikey": "296-28650-2-ND",
"mouser": "595-SN74ACT573NSR"
},
"distributor_check": {
"checked_at": "2026-10-09T04:49:58Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-28650-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-SN74ACT573NSR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "Buffered output enable: when OE is high all eight outputs go to high impedance, and OE should be tied to VCC through a pull-up resistor (minimum value set by the driver's current sink capability) to keep outputs in high-Z during power-up or power-down."
},
{
"number": "2",
"name": "1D",
"type": "input",
"description": "Data input to latch 1, which is passed to output 1Q while LE is high and held when LE goes low."
},
{
"number": "3",
"name": "2D",
"type": "input",
"description": "Data input to latch 2, which is passed to output 2Q while LE is high and held when LE goes low."
},
{
"number": "4",
"name": "3D",
"type": "input",
"description": "Data input to latch 3, which is passed to output 3Q while LE is high and held when LE goes low."
},
{
"number": "5",
"name": "4D",
"type": "input",
"description": "Data input to latch 4, which is passed to output 4Q while LE is high and held when LE goes low."
},
{
"number": "6",
"name": "5D",
"type": "input",
"description": "Data input to latch 5, which is passed to output 5Q while LE is high and held when LE goes low."
},
{
"number": "7",
"name": "6D",
"type": "input",
"description": "Data input to latch 6, which is passed to output 6Q while LE is high and held when LE goes low."
},
{
"number": "8",
"name": "7D",
"type": "input",
"description": "Data input to latch 7, which is passed to output 7Q while LE is high and held when LE goes low."
},
{
"number": "9",
"name": "8D",
"type": "input",
"description": "Data input to latch 8, which is passed to output 8Q while LE is high and held when LE goes low."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable: when high the Q outputs follow the D inputs, and when low the Q outputs latch the logic levels present at D."
},
{
"number": "12",
"name": "8Q",
"type": "tri_state",
"description": "Three-state output of latch 8, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "13",
"name": "7Q",
"type": "tri_state",
"description": "Three-state output of latch 7, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "14",
"name": "6Q",
"type": "tri_state",
"description": "Three-state output of latch 6, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "15",
"name": "5Q",
"type": "tri_state",
"description": "Three-state output of latch 5, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "16",
"name": "4Q",
"type": "tri_state",
"description": "Three-state output of latch 4, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "17",
"name": "3Q",
"type": "tri_state",
"description": "Three-state output of latch 3, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "18",
"name": "2Q",
"type": "tri_state",
"description": "Three-state output of latch 2, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "19",
"name": "1Q",
"type": "tri_state",
"description": "Three-state output of latch 1, which holds the latched level and goes to high impedance when OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Positive supply, specified for 4.5 V to 5.5 V; the datasheet recommends a 0.1 µF bypass capacitor placed as close to the pin as possible."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The 208 mil body width is not stated anywhere in the datasheet text. The NS (SOP, 20) package is lis; Pin assignments come from Figure 4-1 and Table 4-1, which state they apply to the DB, DW, N, NS or P; Page 12 of the package addendum lists SN74ACT573NSR with status NRND (not recommended for new design"
],
"pages_sent": 36,
"cost_usd": 0.0956,
"at": "2026-10-09T04:49:36"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/sn74act573",
"pages": 36,
"sha256": "fe3ab052ad4010d5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
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"units": "mm",
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"seat": "z = 0",
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "cc1e8c924df7969072d7d159e458b36175d9f831a8bec58c4d993b7fdeecf103",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74act573nsr-etched.step",
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"seat": "z = 0",
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"sha256": "a00487329d765be384539a407ee3827abd8770e53b82636ed994d42ddc255ce9",
"checked": "2026-10-17",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOP-20-208mil",
"Category": "Logic",
"Pins": "20"
}
},
"variants": [],
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"discovery_pitch": "SN74ACT573NSR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
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