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SN74ACT533PWR

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Texas Instruments Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ACT533PWR

Texas Instruments · Latches · TSSOP-20

SN74ACT533PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low buffered output enable that places all eight Q outputs in the high-impedance state when high; it should be tied to VCC through a pullup resistor to keep the outputs high-impedance during power up or power down.
2 1Q tri_state Inverting 3-state output of latch 1 that follows the complement of 1D while LE is high and is high-impedance when OE is high.
3 1D input Data input to latch 1; it must be set up at least 4 ns (min, SN74ACT533 at 4.5-5.5 V) before LE falls and held at least 2.5 ns after LE falls.
4 2D input Data input to latch 2; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
5 2Q tri_state Inverting 3-state output of latch 2 that follows the complement of 2D while LE is high and is high-impedance when OE is high.
6 3Q tri_state Inverting 3-state output of latch 3 that follows the complement of 3D while LE is high and is high-impedance when OE is high.
7 3D input Data input to latch 3; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
8 4D input Data input to latch 4; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
9 4Q tri_state Inverting 3-state output of latch 4 that follows the complement of 4D while LE is high and is high-impedance when OE is high.
10 GND power_in Ground reference; the datasheet requires all unused inputs to be held at VCC or GND for proper operation.
11 LE input Latch enable: when high the Q outputs follow the complement of D, and when taken low the outputs latch; the minimum LE high pulse width is 6 ns for SN74ACT533.
12 5Q tri_state Inverting 3-state output of latch 5 that follows the complement of 5D while LE is high and is high-impedance when OE is high.
13 5D input Data input to latch 5; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
14 6D input Data input to latch 6; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
15 6Q tri_state Inverting 3-state output of latch 6 that follows the complement of 6D while LE is high and is high-impedance when OE is high.
16 7Q tri_state Inverting 3-state output of latch 7 that follows the complement of 7D while LE is high and is high-impedance when OE is high.
17 7D input Data input to latch 7; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
18 8D input Data input to latch 8; it must be set up at least 4 ns before LE falls and held at least 2.5 ns after LE falls.
19 8Q tri_state Inverting 3-state output of latch 8 that follows the complement of 8D while LE is high and is high-impedance when OE is high.
20 VCC power_in Supply voltage; the recommended operating range is 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ACT533PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74act533pwr-etched.step / sn74act533pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act533pwr.step / sn74act533pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (11 pp, sha256 3b8982b6e118ce9b, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF