component
SN74ACT08DR
Public Made by Adomby adom
Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
a7f74b6
11d ago
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{
"schema_version": 1,
"type": "component",
"slug": "sn74act08dr",
"title": "SN74ACT08DR",
"brief": "Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"sn74act08dr"
],
"component": {
"mpn": "SN74ACT08DR",
"manufacturer": "Texas Instruments",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic",
"subcategory": "Gates",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74act08.pdf",
"parts": {
"symbol": "sn74act08dr.kicad_sym",
"footprint": "sn74act08dr.kicad_mod",
"model_3d": "sn74act08dr-etched.glb",
"model_3d_plain": "sn74act08dr.glb",
"model_3d_step": "sn74act08dr-etched.step",
"model_3d_step_plain": "sn74act08dr.step",
"lbr": "sn74act08dr.lbr"
},
"distributor_links": {
"digikey": "296-1066-2-ND",
"mouser": "595-SN74ACT08DR",
"lcsc": "C2149499"
},
"pins": [
{
"number": "1",
"name": "1A",
"type": "input",
"description": "Channel 1, Input A. Logic input to gate 1; TTL-compatible, accepts 0V to 5.5V regardless of VCC. VIH ≥ 2V, VIL ≤ 0.8V. Input current ±1µA max."
},
{
"number": "2",
"name": "1B",
"type": "input",
"description": "Channel 1, Input B. Logic input to gate 1; TTL-compatible, accepts 0V to 5.5V. VIH ≥ 2V, VIL ≤ 0.8V."
},
{
"number": "3",
"name": "1Y",
"type": "output",
"description": "Channel 1, Output Y. AND-gate output: Y = 1A · 1B. Drives ±24mA at VCC = 4.5V-5.5V (VOH ≥ 3.7V at -24mA, VOL ≤ 0.5V at 24mA)."
},
{
"number": "4",
"name": "2A",
"type": "input",
"description": "Channel 2, Input A. Logic input to gate 2; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "5",
"name": "2B",
"type": "input",
"description": "Channel 2, Input B. Logic input to gate 2; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "6",
"name": "2Y",
"type": "output",
"description": "Channel 2, Output Y. AND-gate output: Y = 2A · 2B. Drives ±24mA."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0V). Return for VCC supply and all logic-low outputs."
},
{
"number": "8",
"name": "3Y",
"type": "output",
"description": "Channel 3, Output Y. AND-gate output: Y = 3A · 3B. Drives ±24mA."
},
{
"number": "9",
"name": "3A",
"type": "input",
"description": "Channel 3, Input A. Logic input to gate 3; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "10",
"name": "3B",
"type": "input",
"description": "Channel 3, Input B. Logic input to gate 3; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "11",
"name": "4Y",
"type": "output",
"description": "Channel 4, Output Y. AND-gate output: Y = 4A · 4B. Drives ±24mA."
},
{
"number": "12",
"name": "4A",
"type": "input",
"description": "Channel 4, Input A. Logic input to gate 4; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "13",
"name": "4B",
"type": "input",
"description": "Channel 4, Input B. Logic input to gate 4; TTL-compatible, accepts 0V to 5.5V."
},
{
"number": "14",
"name": "VCC",
"type": "power_in",
"description": "Positive supply. 4.5V to 5.5V recommended operating range. Bypass with a 0.1µF ceramic capacitor to GND close to the pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/sn74act08.pdf",
"pages": 37,
"sha256": "49e34f3de1232be0",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-3.81
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
"mark": "drawn"
},
"logic": {
"family_id": "74ACT08",
"logic_family": "74ACT",
"function_code": "08",
"function_class": "Gate",
"function_name": "Quad 2-Input AND Gate",
"manufacturer": "Texas Instruments",
"is_specialty": false
}
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-14",
"Category": "Logic",
"Pins": "14"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sn74act08dr"
],
"discovery_pitch": "SN74ACT08DR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sn74act08dr.kicad_sym",
"sn74act08dr.kicad_mod",
"sn74act08dr.glb",
"sn74act08dr.step",
"sn74act08dr-etched.step",
"sn74act08dr.lbr",
"docs/hero.png",
"docs/sn74act08dr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "SN74ACT08DRD",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DR",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRDB",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRDBR",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRPW",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRPWR",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRN",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRNS",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRNSR",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRBQA",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRBQAR",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRJ",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRW",
"kind": "packaging"
},
{
"mpn": "SN74ACT08DRFK",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T06:35:05.043Z"
}