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SN74ACT08DR

Public Made by Adom

by adom

Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74act08dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md sn74act08dr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
sn74act08dr-etched.fit.json sn74act08dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74act08dr-etched.glb sn74act08dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74act08dr-etched.step sn74act08dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74act08dr.glb Publish 0.1.0 · Ray 1mo ago
sn74act08dr.kicad_mod Publish 0.1.0 · Ray 1mo ago
sn74act08dr.kicad_sym Publish 0.1.0 · Ray 1mo ago
sn74act08dr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 14 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
sn74act08dr.step Publish 0.1.0 · Ray 1mo ago

SN74ACT08DR

Texas Instruments · Gates · SOIC-14

SN74ACT08DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1, Input A. Logic input to gate 1; TTL-compatible, accepts 0V to 5.5V regardless of VCC. VIH ≥ 2V, VIL ≤ 0.8V. Input current ±1µA max.
2 1B input Channel 1, Input B. Logic input to gate 1; TTL-compatible, accepts 0V to 5.5V. VIH ≥ 2V, VIL ≤ 0.8V.
3 1Y output Channel 1, Output Y. AND-gate output: Y = 1A · 1B. Drives ±24mA at VCC = 4.5V-5.5V (VOH ≥ 3.7V at -24mA, VOL ≤ 0.5V at 24mA).
4 2A input Channel 2, Input A. Logic input to gate 2; TTL-compatible, accepts 0V to 5.5V.
5 2B input Channel 2, Input B. Logic input to gate 2; TTL-compatible, accepts 0V to 5.5V.
6 2Y output Channel 2, Output Y. AND-gate output: Y = 2A · 2B. Drives ±24mA.
7 GND power_in Ground reference (0V). Return for VCC supply and all logic-low outputs.
8 3Y output Channel 3, Output Y. AND-gate output: Y = 3A · 3B. Drives ±24mA.
9 3A input Channel 3, Input A. Logic input to gate 3; TTL-compatible, accepts 0V to 5.5V.
10 3B input Channel 3, Input B. Logic input to gate 3; TTL-compatible, accepts 0V to 5.5V.
11 4Y output Channel 4, Output Y. AND-gate output: Y = 4A · 4B. Drives ±24mA.
12 4A input Channel 4, Input A. Logic input to gate 4; TTL-compatible, accepts 0V to 5.5V.
13 4B input Channel 4, Input B. Logic input to gate 4; TTL-compatible, accepts 0V to 5.5V.
14 VCC power_in Positive supply. 4.5V to 5.5V recommended operating range. Bypass with a 0.1µF ceramic capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • SN74ACT08DRD
  • SN74ACT08DR
  • SN74ACT08DRDB
  • SN74ACT08DRDBR
  • SN74ACT08DRPW
  • SN74ACT08DRPWR
  • SN74ACT08DRN
  • SN74ACT08DRNS
  • SN74ACT08DRNSR
  • SN74ACT08DRBQA
  • SN74ACT08DRBQAR
  • SN74ACT08DRJ
  • SN74ACT08DRW
  • SN74ACT08DRFK

CAD (KiCad official)

  • Symbol: SN74ACT08DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74act08dr-etched.step / sn74act08dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act08dr.step / sn74act08dr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74act08dr.step 195 KB You want the bare part, or you mark your own boards.
sn74act08dr-etched.step 2.5 MB You want the part with SN74ACT08DR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 630 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 49e34f3de1232be0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF