component
SN74ABT821ADWR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"name": "OE",
"type": "input",
"description": "Buffered output-enable input places the ten Q outputs in the high-impedance state when high and does not affect the latched data; the outputs are in the high-impedance state during power up or power down when VCC is below 2.1 V."
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{
"number": "2",
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"type": "input",
"description": "Data input to flip-flop 1 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
"number": "3",
"name": "2D",
"type": "input",
"description": "Data input to flip-flop 2 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
"number": "4",
"name": "3D",
"type": "input",
"description": "Data input to flip-flop 3 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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"description": "Data input to flip-flop 4 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
"number": "6",
"name": "5D",
"type": "input",
"description": "Data input to flip-flop 5 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
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"description": "Data input to flip-flop 6 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
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"name": "7D",
"type": "input",
"description": "Data input to flip-flop 7 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
},
{
"number": "9",
"name": "8D",
"type": "input",
"description": "Data input to flip-flop 8 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
},
{
"number": "10",
"name": "9D",
"type": "input",
"description": "Data input to flip-flop 9 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
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{
"number": "11",
"name": "10D",
"type": "input",
"description": "Data input to flip-flop 10 that is captured on the positive transition of CLK; the recommended setup time is 2.1 ns and hold time is 1.3 ns."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device; the recommended supply range is 4.5 V to 5.5 V on VCC relative to this pin."
},
{
"number": "13",
"name": "CLK",
"type": "input",
"description": "Clock input on whose positive transition the ten D inputs are latched and transferred to the Q outputs; maximum clock frequency is 125 MHz with pulse widths of at least 2.9 ns high and 3.8 ns low."
},
{
"number": "14",
"name": "10Q",
"type": "tri_state",
"description": "Three-state buffered output of flip-flop 10 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
},
{
"number": "15",
"name": "9Q",
"type": "tri_state",
"description": "Three-state buffered output of flip-flop 9 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
},
{
"number": "16",
"name": "8Q",
"type": "tri_state",
"description": "Three-state buffered output of flip-flop 8 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "17",
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"type": "tri_state",
"description": "Three-state buffered output of flip-flop 7 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "18",
"name": "6Q",
"type": "tri_state",
"description": "Three-state buffered output of flip-flop 6 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "19",
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"description": "Three-state buffered output of flip-flop 5 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "20",
"name": "4Q",
"type": "tri_state",
"description": "Three-state buffered output of flip-flop 4 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "21",
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"type": "tri_state",
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{
"number": "22",
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"description": "Three-state buffered output of flip-flop 2 that drives high-capacitance or low-impedance bus loads with up to 32 mA IOH and 64 mA IOL."
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{
"number": "23",
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{
"number": "24",
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{
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{
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{
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{
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{
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{
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"name": "Power-down output high-impedance current",
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{
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{
"name": "High-impedance output current low",
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"conditions": "VCC = 0, VI or VO ≤ 4.5 V",
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{
"name": "Output high leakage current",
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"conditions": "VCC = 5.5 V, VO = 5.5 V, outputs high",
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{
"name": "Short-circuit output current",
"symbol": "IO",
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"min": -180,
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"conditions": "VCC = 5.5 V, VO = 2.5 V",
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{
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"min": null,
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"conditions": "VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs high",
"source_page": 4,
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{
"name": "Quiescent supply current, outputs low",
"symbol": "ICC",
"kind": "electrical",
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"conditions": "VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs low",
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{
"name": "Quiescent supply current, outputs disabled",
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"conditions": "VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs disabled",
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{
"name": "Supply current increase per input at TTL level",
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"conditions": "VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND",
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{
"name": "Input capacitance",
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