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Initial commit: component/sn65mlvd206dr

Ray ·886d845338 ·28d ago
2 files changed +84
README.mdadded+50
@@ -0,0 +1,50 @@+# SN65MLVD206DR++**Texas Instruments** · LVDS ICs · SOIC-8++SN65MLVD206DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | R | output | Receiver single-ended CMOS output (LVTTL). Drives VOH ≥ 2.4 V at IOH = -8 mA and VOL ≤ 0.4 V at IOL = 8 mA. Reflects the state of the differential A/B bus inputs when the receiver is enabled (RE = L). High-impedance when RE = H. |+| 2 | RE | input | Receiver enable, active-low CMOS input. Drive low to enable receiver output R; drive high to place R in the high-impedance state. VIH ≥ 2 V, VIL ≤ 0.8 V. |+| 3 | DE | input | Driver enable, active-high CMOS input. Drive high to enable the differential driver on pins A/B; drive low to place A/B in the high-impedance state. VIH ≥ 2 V, VIL ≤ 0.8 V. |+| 4 | D | input | Driver single-ended CMOS data input. Logic level applied here is transmitted differentially on the A/B bus pins when DE = H. VIH ≥ 2 V, VIL ≤ 0.8 V; input current 0-10 µA. |+| 5 | GND | power_in | Ground reference. All voltages are measured with respect to this pin. Connect to the board ground plane. |+| 6 | A | bidirectional | Non-inverting M-LVDS bus I/O. Driver output when DE = H (|VAB| typ 480 mV, max 650 mV into 50 Ω, VOS ≈ 0.8-1.2 V); receiver input otherwise. Common-mode input range -1.4 V to 3.8 V. High-impedance when driver is disabled or VCC ≤ 1.5 V. |+| 7 | B | bidirectional | Inverting M-LVDS bus I/O. Driver output when DE = H (complement of A); receiver input otherwise. Common-mode input range -1.4 V to 3.8 V. High-impedance when driver is disabled or VCC ≤ 1.5 V. |+| 8 | VCC | power_in | Positive supply, 3.0 V to 3.6 V (3.3 V nominal). Bypass locally with a low-ESR ceramic capacitor to GND. Supply current is 22 mA typ (driver only), 16 mA typ (both enabled, receiver-only 4 mA typ). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Interface |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `SN65MLVD206DRD`+- `SN65MLVD206DR`++## CAD (KiCad official)++- Symbol: `SN65MLVD206DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65mlvd206.pdf) (31 pp, sha256 `5073de1b180d3c83`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65mlvd206dr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "sn65mlvd206dr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments LVDS ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "sn65mlvd206dr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn65mlvd206dr.kicad_sym",+    "sn65mlvd206dr.kicad_mod",+    "sn65mlvd206dr.glb",+    "sn65mlvd206dr.step",+    "sn65mlvd206dr.lbr",+    "docs/hero.png",+    "docs/sn65mlvd206dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file